Packet processing configurations
AssigneeIntel Corporation
InventorsLuyao Zhong, Ruijing Guo, Yongli He, Hejie Xu, Ziye Yang
Life of this patent
Estimating the term…
Abstract
Examples described herein relate to an interface and a network interface device coupled to the interface and comprising circuitry. In some examples, the circuitry is to receive packet data to be egressed, wherein the packet data does not specify a destination for the packet data and process the packet data to be egressed to generate a mapping of ingress packet-to-target based on a determination.
Claims20
An apparatus comprising:
- a network interface device comprising:
- a host interface;
- a direct memory access (DMA) circuitry;
- a network interface;
- and
- circuitry to:
- receive packet data to be egressed in an express Data Path (XDP) raw frame, and
- based on the XDP raw frame, generate a mapping of ingress packets-to-targets comprising flow-to-destination steering data, wherein a target of the targets comprises a queue or a core.
At least one non-transitory computer-readable medium comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to:
- execute a driver to configure a network interface device to:
- based on transmission of an egress frame, generate a descriptor to cause parsing of the egress frame to update an association of ingress packets to one or more queues or cores, wherein:
- the network interface device comprises a host interface, a direct memory access (DMA) circuitry, and a network interface,
- the egress frame comprises an express Data Path (XDP) raw frame, and
- the association comprises flow-to-destination steering data.
A method comprising:
- receiving, at a network interface device, packet data to be transmitted in an egress frame;
- receiving, at the network interface device, a descriptor associated with the packet data;
- and
- processing, at the network interface device, the packet data based on the descriptor to generate a mapping of received packet-to-target queues or cores, wherein:
- the network interface device comprises a host interface, a direct memory access (DMA) circuitry, and a network interface,
- the egress frame comprises an express Data Path (XDP) raw frame, and
- the mapping of received packet-to-target queues or cores comprises a flow-to-destination steering data.
Dependencies are inferred from the claim text.