State reduction for sequence estimation based on signal quality
AssigneeQUALCOMM Incorporated
InventorsOndrej Jakubov, Paul Stephen Cooke
Life of this patent
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Abstract
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a wireless receiver may receive a sequence of bits. The wireless receiver may determine a signal quality for a packet of the sequence of bits. The wireless receiver may apply a reduced state low power mode based at least in part on the signal quality being outside of a signal quality margin. Numerous other aspects are described.
Claims15
A method of wireless communication performed by a wireless receiver, comprising:
- receiving a sequence of bits;
- determining a signal quality for a packet of the sequence of bits;
- applying a reduced state low power mode based at least in part on the signal quality being outside of a signal quality margin;
- and
- wherein applying the reduced state low power mode includes using a reduced set of states as part of a Viterbi algorithm;
- and
- wherein applying the reduced state low power mode includes:
- determining one or more states for each state position of a trellis as part of time-stepping through the sequence of bits using the Viterbi algorithm;
- storing previous state positions of the trellis and associated branch decisions;
- and
- tracing back through the previous state positions and the associated branch decisions to determine, from a stored global winning state, a transmitted sequence associated with the sequence of bits.
An apparatus for wireless communication at a wireless receiver, comprising:
- one or more memories;
- and
- one or more processors coupled to the one or more memories, the one or more processors individually or collectively configured to cause the wireless receiver to:
- receive a sequence of bits;
- determine a signal quality for a packet of the sequence of bits;
- apply a reduced state low power mode based at least in part on the signal quality being outside of a signal quality margin;
- wherein to apply the reduced state low power mode, the one or more processors are individually or collectively configured to cause the wireless receiver to use a reduced set of states as part of a Viterbi algorithm;
- and
- wherein to apply the reduced state low power mode, the one or more processors are individually or collectively configured to cause the wireless receiver to:
- determine one or more states for each state position of a trellis as part of time-stepping through the sequence of bits using the Viterbi algorithm;
- store previous state positions of the trellis and associated branch decisions;
- and
- trace back through the previous state positions and the associated branch decisions to determine, from a stored global winning state, a transmitted sequence associated with the sequence of bits.
An apparatus for wireless communication, comprising:
- means for receiving a sequence of bits;
- means for determining a signal quality for a packet of the sequence of bits;
- and
- means for applying a reduced state low power mode based at least in part on the signal quality being outside of a signal quality margin;
- wherein applying the reduced state low power mode includes using a reduced set of states as part of a Viterbi algorithm;
- and
- wherein applying the reduced state low power mode includes:
- determining one or more states for each state position of a trellis as part of time-stepping through the sequence of bits using the Viterbi algorithm;
- storing previous state positions of the trellis and associated branch decisions;
- and
- tracing back through the previous state positions and the associated branch decisions to determine, from a stored global winning state, a transmitted sequence associated with the sequence of bits.
Dependencies are inferred from the claim text.