High-performance SCL bit-flip decoder for concatenated polar codes

An apparatus for encoding and transmitting a concatenated polar codeword, comprising:

• one or more hardware elements configured to:
• evaluate reliabilities of N channels under a design parameter Eb/n0 and select M0 channels of the N channels based on a relative reliability of each channel;
• construct a polar code of M0 information bits, the M0 information bits arranged with a front and a rear;
• construct a cyclic redundancy checking (CRC) code with KCRC additional bits and attach the KCRC additional bits to the rear of the M0 information bits;
• construct a Parity Check (PC) code with KPC parity bits by:
• partitioning the M0 information bits into KPC segments, wherein each of the KPC segments corresponds to a PC equation, wherein constructing the PC equation comprises:
• generating channel reliability data,
• selecting non-frozen bits according to the channel reliability data,
• dividing the selected non-frozen bits into K segments,
• evaluating, sequentially, each bit of each segment to select a most unreliable bit from each segment that has not already been selected, and
• storing selected bits as a parity set,
• wherein the PC equation for each segment of the KPC segments is associated with a sum of a parity check bit of the segment and only the most unreliable bit of each preceding segment that has not already been selected;
• insert the parity bits at proper locations to yield a bit string, wherein the bit string is a concatenation of the M information bits, the attached KCRC additional bits, and the inserted parity bits;
• insert frozen bits to the bit string and setting the frozen bits to 0;
• feed the bit string into a polar encoder and obtain a concatenated polar codeword x1N;
• and
• transmitting a signal comprising the concatenated polar codeword x1N.