Multi-phase buck converter and chip

A chip, comprising:

• a die, on which a multi-phase buck converter is provided,
• wherein the multi-phase buck converter comprises:
• M converter branches connected in parallel, each of the M converter branches comprising a driving module and a power stage output circuit electrically coupled between the driving module and a voltage output terminal, wherein M is an integer greater than 2;
• and
• a loop error amplifier, configured to compare an output voltage at the voltage output terminal with a reference voltage to generate an output voltage error signal,
• wherein the driving module in one of the M converter branches, other than a first converter branch, from a second to an Mth converter branch comprises:
• a current information error amplifier, configured to receive, as a first terminal input, a detection voltage across an output inductor of the power stage output circuit in the one of the M converter branches, to receive, as a second terminal input, a detection voltage across an output inductor of the power stage output circuit in a previous converter branch, and to compare the first terminal input with the second terminal input to generate a current information error signal;
• a synchronous ramp voltage generation circuit, configured to generate a synchronous ramp signal based on the output voltage at the voltage output terminal;
• a pulse width modulation comparator, configured to superimpose the current information error signal to the output voltage error signal to generate a modulation voltage signal, and compare the modulation voltage signal with the synchronous ramp signal to generate a duty cycle modulation set signal;
• and
• a driving control circuit, configured to generate a driving signal based on the duty cycle modulation set signal, such that the power stage output circuit in the one of the M converter branches outputs the output voltage based on the driving signal,
• wherein an input terminal of one of the power stage output circuits is electrically coupled to an output terminal of a corresponding driving module through a first trace on the die, an output terminal of the power stage output circuit is electrically coupled to the voltage output terminal through a second trace on the die, and the voltage output terminal is configured to be electrically coupled to a load;
• wherein the driving control circuit in the one of the M converter branches comprises:
• an RS flip-flop, configured to generate a duty cycle signal based on the duty cycle modulation set signal;
• and
• a switch driving circuit, configured to generate the driving signal based on the duty cycle signal;
• wherein the driving module in the one of the M converter branches further comprises:
• an adaptive constant-on-time generation circuit, configured to generate a duty cycle reset signal based on the duty cycle signal and a reference switching frequency of the one of the M converter branches,
• wherein the RS flip-flop is configured to generate the duty cycle signal based on the duty cycle modulation set signal and the duty cycle reset signal;
• wherein the adaptive constant-on-time generation circuit is configured to:
• generate a frequency error signal based on the duty cycle signal and the reference switching frequency:
• generate an adaptive on-capacitance voltage signal based on the duty cycle signal;
• and
• generate the duty cycle reset signal based on the frequency error signal and the adaptive on-capacitance voltage signal;
• wherein the synchronous ramp voltage generation circuit in the one of the M converter branches is configured to:
• generate the synchronous ramp signal based on the output voltage and a voltage at a switch output terminal of the power stage output circuit in the one of the M converter branches,
• wherein the output inductor is electrically coupled between the switch output terminal and the voltage output terminal.