Semiconductor system and wiring defect detecting method

A semiconductor system comprising:

• a first semiconductor chip;
• a second semiconductor chip stacked above the first semiconductor chip;
• a controller configured to control the first and second semiconductor chips;
• a first wiring connected between the controller and each of the first and second semiconductor chips and by which a first signal is to be transmitted from the controller to each of the first and second semiconductor chips;
• a second wiring connected between the controller and each of the first and second semiconductor chips and by which a second signal is to be transmitted from the controller to each of the first and second semiconductor chips;
• a third wiring connected between the controller and the first semiconductor chip and by which currents of the first and second signals flowing through the first and second wirings to the first semiconductor chip are to be returned to the controller;
• and
• a fourth wiring connected between the controller and the second semiconductor chip and by which currents of the first and second signals flowing through the first and second wirings to the second semiconductor chip are to be returned to the controller, wherein
• the first semiconductor chip includes a first rectification circuit in a current path between the first wiring and the third wiring, that is configured to cut off the current of the first signal from flowing to the third wiring or allow the current of the first signal to flow to the third wiring, and a second rectification circuit in a current path between the second wiring and the third wiring, that is configured to cut off the current of the second signal from flowing to the third wiring or allow the current of the second signal to flow to the third wiring, and
• the second semiconductor chip includes a third rectification circuit in a current path between the first wiring and the fourth wiring, that is configured to cut off the current of the first signal from flowing to the fourth wiring or allow the current of the first signal to flow to the fourth wiring, and a fourth rectification circuit in a current path between the second wiring and the fourth wiring, that is configured to cut off the current of the second signal from flowing to the fourth wiring or allow the current of the second signal to flow to the fourth wiring.