Managing allocation of blocks across planes in a memory sub-system
AssigneeMicron Technology, Inc.
InventorsYu-Chung Lien, Aaron Lee, Zhenming Zhou
Life of this patent
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Abstract
A processing device, operatively coupled with a memory device, performs a first programming operation on a first set of cells addressable by a first wordline of a first plane of the memory device. The processing device identifies a predefined index shift value associated with the first wordline. The processing device determines, by applying the predefined index shift value to a first index value of the first wordline, a second index value of a second wordline of a second plane of the memory device. The processing device further performs a second programming operation on a second set of cells addressable by the second wordline of the second plane.
Claims20
A system comprising:
- a memory device;
- and
- a processing device, operatively coupled with the memory device, to perform operations comprising:
- performing a first programming operation on a first set of cells addressable by a first wordline of a first plane of the memory device;
- retrieving, from an entry of a metadata structure, a predefined index shift value associated with the first wordline, wherein the metadata structure comprises a plurality of entries, each entry associating a respective index value of a wordline of the memory device with a corresponding predefined index shift value;
- determining, by applying the predefined index shift value associated with the first wordline to a first index value of the first wordline, a second index value of a second wordline of a second plane of the memory device;
- and
- performing a second programming operation on a second set of cells addressable by the second wordline of the second plane.
A method comprising:
- performing a first programming operation on a first set of cells addressable by a first wordline of a first plane of a memory device;
- retrieving, from an entry of a metadata structure, a predefined index shift value associated with the first wordline, wherein the metadata structure comprises a plurality of entries, each entry associating a respective index value of a wordline of the memory device with a corresponding predefined index shift value;
- determining, by applying the predefined index shift value associated with the first wordline to a first index value of the first wordline, a second index value of a second wordline of a second plane of the memory device;
- and
- performing a second programming operation on a second set of cells addressable by the second wordline of the second plane.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- performing a first programming operation on a first set of cells addressable by a first wordline of a first plane of a memory device;
- retrieving, from an entry of a metadata structure, a predefined index shift value associated with the first wordline, wherein the metadata structure comprises a plurality of entries, each entry associating a respective index value of a wordline of the memory device with a corresponding predefined index shift value;
- determining, by applying the predefined index shift value associated with the first wordline to a first index value of the first wordline, a second index value of a second wordline of a second plane of the memory device;
- and
- performing a second programming operation on a second set of cells addressable by the second wordline of the second plane.
Dependencies are inferred from the claim text.