Gate driver and display device including the same

A display device, comprising:

• a display panel including an active area in which a plurality of pixels is disposed;
• and
• a gate driver including a plurality of stages which are connected to one another,
• wherein each of the plurality of stages includes:
• a node controller configured to control voltages of a Q node, a Q1 node, a Q2 node, a QB node, a QB1 node, and a QB2 node based on a first clock signal and a second clock signal;
• a carry signal output unit configured to output a carry signal to a next stage based on the voltages of the Q1 node and the QB1 node;
• and
• a scan signal output unit configured to output a scan signal to a scan line based on the voltages of the Q node and the QB node,
• wherein a width of the scan signal is determined by a toggling timing of the first clock signal and a toggling timing of the second clock signal,
• wherein the carry signal output unit includes:
• an eighth transistor including a first electrode connected to a gate low voltage supply line, a gate electrode connected to the Q1 node, and a second electrode connected to a carry signal output terminal;
• and
• a ninth transistor including a first electrode connected to a gate high voltage supply line, a gate electrode connected to the QB1 node, and a second electrode connected to the carry signal output terminal, and
• wherein the carry signal output unit further includes:
• a fourth capacitor connected between the gate electrode and the second electrode of the eighth transistor;
• and
• a fifth capacitor which is connected between the gate low voltage supply line and the carry signal output terminal.