Neuromorphic computing device with three-dimensional memory

A device comprising:

• a back end of line layer including a three-dimensional memory array, the three-dimensional memory array including a plurality of memory cells to store a plurality sets of weight values of a neural network model;
• and
• a front end of line layer including:
• a controller to:
• apply one or more input voltages corresponding to an input to the neural network model to the three-dimensional memory array, and
• receive one or more output voltages from the three-dimensional memory array to perform computations of the neural network model;
• wherein the three-dimensional memory array includes:
• a plurality of local select lines extending along the first direction, the plurality of local select lines including a plurality of sets of local select lines, the plurality of sets of local select lines being spaced from one another along a second direction orthogonal to the first direction;
• a plurality of local bit lines extending along the first direction, the plurality of local bit lines including a plurality of sets of local bit lines, the plurality of sets of local bit lines being spaced from one another along the second direction;
• and
• a plurality of word lines extending along a third direction orthogonal to the first and second directions, the plurality of word lines including a plurality of sets of word lines, the plurality of sets of word lines being spaced from one another along the second direction.

A method comprising:

• applying, by a word line control circuit in a first layer, one or more input voltages to a three-dimensional memory array disposed in a second layer with respect to the first layer along a first direction, wherein the three-dimensional memory array includes:
• (i) a plurality of local select lines extending along the first direction, the plurality of local select lines including a plurality of sets of local select lines, the plurality of sets of local select lines being spaced from one another along a second direction orthogonal to the first direction;
• (ii) a plurality of local bit lines extending along the first direction, the plurality of local bit lines including a plurality of sets of local bit lines, the plurality of sets of local bit lines being spaced from one another along the second direction;
• and (iii) a plurality of word lines extending along a third direction orthogonal to the first and second directions, the plurality of word lines including a plurality of sets of word lines, the plurality of sets of word lines being spaced from one another along the second direction;
• and
• receiving, by a set of sensing circuits in the first layer from the three-dimensional memory array in the second layer, one or more output voltages in response to the one or more input voltages,
• wherein the one or more input voltages correspond to input data of one or more weight layers of a neural network model, and
• wherein the one or more output voltages correspond to computation results of the one or more weight layers of the neural network model.