Canceling prefetch of cache blocks based on an address and a bit field
AssigneeSiFive, Inc.
InventorsEric Andrew Gouldey, Wesley Terpstra, Michael Klinglesmith
Life of this patent
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AssigneeSiFive, Inc.
InventorsEric Andrew Gouldey, Wesley Terpstra, Michael Klinglesmith
Estimating the term…
Prefetch circuitry may be configured to transmit a message to cancel a prefetch of one or more cache blocks of a group. The message may correspond to a prefetch message by indicating an address for the group and a bit field for the one or more cache blocks of the group to cancel. In some implementations, the message may target a higher level cache to cancel prefetching the one or more cache blocks, and the message may be transmitted to the higher level cache via a lower level cache. In some implementations, the message may target a higher level cache to cancel prefetching the one or more cache blocks, the message may be transmitted to a lower level cache via a first command bus, and the lower level cache may forward the message to the higher level cache via a second command bus.
An apparatus comprising:
A method comprising:
A non-transitory computer readable medium comprising a circuit representation that, when processed by a computer, is used to program or manufacture an integrated circuit comprising a cache configured to:
Dependencies are inferred from the claim text.