US 12,748,398 B1 · High speed communication with microprocessors

Abstract

Wireless monitors can be attached or affixed to industrial machines in a plant to collect machine data, and transmit machine data to a maintenance and monitoring infrastructure. The machine data can be analyzed with failure analysis models to generate diagnostics and failure predictions, and to monitor the health of industrial assets in the plant. The wireless monitors can include microprocessors to control the operations of the device. A plurality of microprocessors can be flashed and batch-tested before assembling them into the sealed wireless monitors. Interfaces and protocols, for flashing and/or debugging the microprocessors of the wireless monitors, can include two single-ended signal interface and protocol layers, coupled with an intermediary differential signal interface and protocol layer.

Claims20

Dependent claims

A system comprising:

a host-side interface and protocol layer (HIPL) microcontroller comprising an HIPL input pin and an HIPL output pin, the HIPL microcontroller comprising an interface and protocol compatible with communication with a microprocessor, the HIPL output pin coupled with an HIPL transistor, configured to generate a selected high or low voltage on the HIPL output pin;
a microprocessor-side interface and protocol layer (MIPL) microcontroller, comprising an input/output MIPL pin, the MIPL microcontroller comprising the interface and protocol compatible with communication with the microprocessor, the MIPL pin coupled with an MIPL transistor, configured to generate a selected high or low voltage on the MIPL pin;
an auxiliary interface and protocol layer (AIPL), the AIPL coupling the HIPL and the MIPL;
a diode coupled between the AIPL and the MIPL pin;
and
a transistor coupled between a positive terminal of the diode and a high voltage.

3 more elements

A method comprising:

providing a host-side interface and protocol layer (HIPL) microcontroller comprising an HIPL input pin and an HIPL output pin, the HIPL microcontroller comprising an interface and protocol compatible with communication with a microprocessor, the HIPL output pin coupled with an HIPL transistor, configured to generate a selected high or low voltage on the HIPL output pin;
providing a microprocessor-side interface and protocol layer (MIPL) microcontroller, comprising an input/output MIPL pin, the MIPL microcontroller comprising the interface and protocol compatible with communication with the microprocessor, the MIPL pin coupled with an MIPL transistor, configured to generate a selected high or low voltage on the MIPL pin;
providing an auxiliary interface and protocol layer (AIPL), the AIPL coupling the HIPL and the MIPL;
providing a diode coupled between the AIPL and the MIPL pin;
and
providing a transistor coupled between a positive terminal of the diode and a high voltage.

3 more elements

Dependencies are inferred from the claim text.

High speed communication with microprocessors

Life of this patent

High speed communication with microprocessors

Life of this patent

Abstract

Claims20