Package-on-package assembly containing a decoupling capacitor

A microelectronic assembly comprising:

• a first package comprising a first semiconductor structure that is electrically connected to a first package substrate;
• a second package that is electrically connected and disposed adjacent to the first package, wherein the second package comprises a second semiconductor structure that is electrically connected to a second package substrate;
• a decoupling capacitor having a first surface and an opposing second surface, wherein the decoupling capacitor contains alternating dielectric layers and internal electrode layers, the internal electrode layers containing first internal electrode layers and second internal electrode layers, wherein the decoupling capacitor further contains a first external terminal that is electrically connected to the first internal electrode layers and disposed on the first surface of the decoupling capacitor, a second external terminal that is electrically connected to the first internal electrode layers and disposed on the second surface of the decoupling capacitor, a third external terminal that is electrically connected to the second internal electrode layers and disposed on the first surface of the decoupling capacitor, and a fourth external terminal that is electrically connected to the second internal electrode layers and disposed on the second surface of the decoupling capacitor, wherein the first external terminal and the third external terminal are electrically connected to the second package substrate;
• and
• a circuit board, wherein the second external terminal and the fourth external terminal of the decoupling capacitor are electrically connected to the circuit board.