Method for manufacturing display device and display device

A method for manufacturing a display device, the method comprising:

• forming a first resist layer over a substrate;
• patterning the first resist layer by removing, through exposure and development, the first resist layer formed above a first region of the substrate;
• forming a first charge-transport material layer over the patterned first resist layer and above the first region of the substrate with the first resist layer removed;
• forming a first light-emitting material layer over the first charge-transport material layer;
• forming a second resist layer over the first light-emitting material layer;
• patterning the second resist layer by removing, through exposure and development, the first resist layer formed above a second region of the substrate, followed by lifting off the first charge-transport material layer, the first light-emitting material layer, and the second resist layer formed over the first resist layer above the second region;
• forming a second charge-transport material layer over the patterned second resist layer and above the second region of the substrate with the first resist layer removed;
• and
• forming a second light-emitting material layer over the second charge-transport material layer.

A display device comprising:

• a plurality of pixel electrodes disposed in correspondence with a plurality of subpixel formation regions;
• a first common charge transport layer provided over the plurality of pixel electrodes;
• a first light-emitting layer and a second light-emitting layer, each provided, over the first common charge transport layer, in a location facing a corresponding one of the plurality of pixel electrodes;
• a bank provided upright so as to define ends of light-emitting regions where light is emitted in the first and second light-emitting layers;
• a common electrode provided over both of the first light-emitting layer and the second light-emitting layer, the first common charge transport layer and the common electrode being disposed over the bank;
• and
• a resist layer provided in a location overlapping the bank in a plan view, and between the first common charge transport layer and the common electrode.