Semiconductor device and manufacturing method thereof

A method comprising:

• receiving a substrate having a metal gate, gate spacers on sides of the metal gate, interlayer dielectric (ILD) material over a plurality of source/drain regions, and an etch stop layer (ESL) extending above the gate spacers and disposed between the gate spacers and the ILD material;
• depositing tungsten (W) material over the substrate above the metal gate, over a surface of the gate spacers, and along a sidewall of the ESL;
• removing a first portion of the W material from the sidewall of the ESL and over the surface of the gate spacers using an ammonium solution;
• removing, from the sidewall of the ESL and over the surface of the gate spacers, W material remaining after removing the first portion of the W material via wet etching operations using an ozone solution to form a W cap;
• and
• forming a via gate (VG) contact on the W cap through a contact etch stop layer (CESL) and an ILD layer formed over the W cap.

A method comprising:

• receiving a substrate having a metal gate, gate spacers on sides of the metal gate, interlayer dielectric (ILD) material over a plurality of source/drain regions, and an etch stop layer (ESL) extending above the gate spacers and disposed between the gate spacers and the ILD material;
• depositing tungsten (W) material over the substrate above the metal gate, over a surface of the gate spacers, and along a sidewall of the ESL;
• removing a first portion of the W material from the sidewall of the ESL and over the surface of the gate spacers via 1st wet etching operations;
• removing, from the sidewall of the ESL and over the surface of the gate spacers, W material remaining after removing the first portion of the W material via 2nd wet etching operations to form a W cap over the metal gate;
• forming a contact via opening in an ILD layer and a contact etch stop layer (CESL) over the W cap;
• and
• forming a via gate (VG) on the W cap through the contact via opening.