Resistor structure including charge control layer
AssigneeTexas Instruments Incorporated
InventorsSagnik Dey, Dhanoop Varghese, Dong Seup Lee
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AssigneeTexas Instruments Incorporated
InventorsSagnik Dey, Dhanoop Varghese, Dong Seup Lee
Estimating the term…
The present disclosure generally relates to a resistor structure having a charge control layer. In an example, an integrated circuit includes a semiconductor substrate, a dielectric layer, a first contact, a second contact, and a charge control layer. The semiconductor substrate includes a semiconductor hetero-structure. The dielectric layer is disposed over the semiconductor substrate. The first contact is disposed through the dielectric layer and contacting the semiconductor hetero-structure. The second contact is disposed through the dielectric layer and contacting the semiconductor hetero-structure. The second contact is disposed laterally separated from the first contact. The charge control layer is disposed over the semiconductor hetero-structure and laterally between the first contact and the second contact. At least a portion of the dielectric layer is disposed between the charge control layer and the semiconductor hetero-structure.
A semiconductor device, comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.