US 12,744,692 B2 · Receiver receiving data signal of multi-level and electronic system including the same

Abstract

A receiver includes a first decision feedback equalization (DFE) circuit configured to receive a first multi-level data signal, and output a first bit correction signal correcting a level of the first multi-level data signal based on first bit data of a second multi-level data signal received before the first multi-level data signal, a second DFE circuit configured to output a DFE signal based on second bit data of the second multi-level data signal and levels of data signals received before the second multi-level data signal, and a slicer configured to determine first bit data of the first multi-level data signal based on a level of the first bit correction signal, and correct the level of the first bit correction signal with a second bit correction signal based on the DFE signal.

Claims20

Dependent claims

A receiver comprising:

a first decision feedback equalization (DFE) circuit configured to receive a first multi-level data signal, and output a first bit correction signal correcting a level of the first multi-level data signal based on first bit data of a second multi-level data signal received before the first multi-level data signal;
a second DFE circuit configured to output a DFE signal based on second bit data of the second multi-level data signal and levels of data signals received before the second multi-level data signal;
and
a slicer configured to determine first bit data of the first multi-level data signal based on a level of the first bit correction signal, correct the level of the first bit correction signal with a second bit correction signal based on the DFE signal, and determine second bit data of the first multi-level data signal based on a level of the second bit correction signal.

1 more element

A receiver comprising:

a slicer configured to receive a first multi-level data signal, and determine first bit data and second bit data of the first multi-level data signal based on a level of the first multi-level data signal;
and
a first decision feedback equalization (DFE) circuit configured to receive a second multi-level data signal following the first multi-level data signal, and correct a level of the second multi-level data signal based on the first bit data of the first multi-level data signal,
wherein the slicer is further configured to determine first bit data of the second multi-level data signal based on the level of the second multi-level data signal, correct the level of the second multi-level data signal based on the second bit data of the first multi-level data signal, and determine second bit data of the second multi-level data signal based on the level of the second multi-level data signal.

1 more element

Dependencies are inferred from the claim text.

Receiver receiving data signal of multi-level and electronic system including the same

Life of this patent

Receiver receiving data signal of multi-level and electronic system including the same

Life of this patent

Abstract

Claims20