Input synchronization for cyclic queueing and forwarding (CQF)
AssigneeHuawei Technologies Co., Ltd.
InventorNorman William Finn
Life of this patent
Estimating the term…
Abstract
According to embodiments, a first device transmits a timing marker frame (TMF) in a first transmission cycle. The first device determines a transmission time of the TMF. The first device determines a time difference between the transmission time of the TMF and a start time of a second transmission cycle. The first device transmits to a second device a phase offset message (POM) indicating the time difference. The first device transmits frames in a transmission cycle subsequent to the first transmission cycle.
Claims20
A method comprising:
- transmitting, by a first device to a second device, a timing marker frame (TMF) in a first transmission cycle;
- determining, by the first device, a transmission time of the TMF;
- determining, by the first device, a time difference between the transmission time of the TMF and a start time of a second transmission cycle;
- transmitting, by the first device to the second device, a phase offset message (POM) indicating the time difference;
- and
- transmitting, by the first device to the second device, frames in a transmission cycle subsequent to the first transmission cycle.
A method comprising:
- receiving, by a second device from a first device, a timing marker frame (TMF) in a first receive cycle;
- receiving, by the second device from the first device, a phase offset message (POM) indicating a time difference;
- determining, by the second device, a receive time of the TMF;
- determining, by the second device, a start time of a second receive cycle based on the receive time of the TMF and the time difference indicated in the POM;
- and
- receiving, by the second device from the first device, frames in a receive cycle subsequent to the first receive cycle based on the start time of the second receive cycle.
A first device comprising:
- a non-transitory memory storage storing instructions;
- and
- one or more processors in communication with the non-transitory memory storage, wherein the instructions, when executed by the one or more processors, cause the first device to perform operations including:
- transmitting, to a second device, a timing marker frame (TMF) in a first transmission cycle;
- determining a transmission time of the TMF;
- determining a time difference between the transmission time of the TMF and a start time of a second transmission cycle;
- transmitting, to the second device, a phase offset message (POM) indicating the time difference;
- and
- transmitting, to the second device, frames in a transmission cycle subsequent to the first transmission cycle.
A second device comprising:
- a non-transitory memory storage comprising instructions;
- and
- one or more processors in communication with the non-transitory memory storage, wherein the instructions, when executed by the one or more processors, cause the second device to perform operations including:
- receiving, from a first device, a timing marker frame (TMF) in a first receive cycle;
- receiving, from the first device, a phase offset message (POM) indicating a time difference;
- determining a receive time of the TMF;
- determining a start time of a second receive cycle based on the receive time of the TMF and the time difference indicated in the POM;
- and
- receiving, from the first device, frames in a receive cycle subsequent to the first receive cycle based on the start time of the second receive cycle.
Dependencies are inferred from the claim text.