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US 12,744,502 B2Granted
Two-stage circuit with power supply rejection filter
AssigneeQUALCOMM Incorporated
InventorsMarco Vigilante, Yunliang Zhu
Life of this patent
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Abstract
A two-stage circuit includes a differential-to-single-ended first stage with a differential pair of transistors. The first stage includes a current mirror including a diode-connected transistor having an RC circuit coupled to a drain of the diode-connected transistor. The current mirror is configured to mirror a power supply noise current conducted by the RC circuit through a first stage output terminal to a gate of an output transistor in a second stage of the two-stage circuit.
Claims17
A two-stage circuit comprising:
- a first stage including:
- a differential pair of transistors;
- a current mirror coupled to a terminal of a first transistor in the differential pair of transistors, the current mirror including a diode-connected transistor;
- a resistor-capacitor (RC) circuit that is coupled between a drain of the diode-connected transistor and ground;
- and
- a second stage including an output transistor having a gate coupled to an output terminal of the first stage,
- wherein the two-stage circuit comprises a two-stage low dropout regulator, and wherein a gate of the first transistor in the differential pair of transistors is coupled to a drain of the output transistor, the two-stage low dropout regulator further comprising:
- a reference voltage source configured to bias a gate of a second transistor in the differential pair of transistors with a reference voltage.
5 more elements
A two-stage circuit, comprising:
- a first stage including:
- a first stage output terminal;
- a low-impedance node, wherein an impedance of the low-impedance node is lower than an impedance of the first stage output terminal;
- a differential pair of transistors coupled to the first stage output terminal and the low-impedance node;
- an RC circuit having a resistor in series with a capacitor, wherein the RC circuit is coupled between ground and the low-impedance node;
- and
- a second stage including an output transistor having a gate coupled to the first stage output terminal,
- wherein a drain of the output transistor is coupled to a gate of a first transistor in the differential pair of transistors, the two-stage circuit further comprising a reference voltage source configured to bias a gate of a second transistor in the differential pair of transistors with a reference bias voltage.
5 more elements
Dependencies are inferred from the claim text.