Single-phase seven-level inverter
AssigneeWayne State University
InventorsJianfei Chen, Caisheng Wang
Life of this patent
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Abstract
An exemplary system includes an inverter coupled to a DC source, a plurality of power switches and a plurality of DC-link capacitors that synthesize seven output voltage levels. In one example the inverter includes a four-level active neutral pointed clamped inverter (4L-ANCP) that includes six power switches of the plurality of power switches and is operated at a switching frequency with a first voltage stress level, and a half-bridge that includes two other of the power switches coupled to the 4L-ANCP and operated at a fundamental frequency with a second voltage stress, the second voltage stress being higher than the first voltage stress level.
Claims14
An inverter coupled to a DC source, comprising:
- a neutral point clamped inverter;
- a half-bridge, wherein the neutral point clamped inverter and the half-bridge include a plurality of power switches,
- a plurality of DC-link capacitors that synthesize seven output voltage levels;
- wherein the neutral pointed clamped inverter includes at least some of the plurality of power switches and is operated at a switching frequency with a first voltage stress level;
- and
- wherein the half-bridge includes at least some other of the plurality of power switches coupled to the neutral point clamped inverter and operated at a fundamental frequency with a second voltage stress, the second voltage stress being higher than the first voltage stress level;
- and
- a voltage balance controller configured to utilize a plurality of reference signals and a carrier signal;
- wherein the carrier signal is a triangular carrier signal;
- wherein the plurality of reference signals are defined by:
- u
- ref
- =
- 2
-
- m
-
- V
- m
-
- sin
-
- (
- 2
-
- π
-
- f
- m
-
- t
- )
- ;
- where m is a modulation index, fm is the fundamental frequency of the inverter, Vm is an amplitude of one of the plurality of reference signals, and t is a charging time;
- wherein the amplitude is defined by:
- u
- ref
-
- 1
- =
- ❘
- "\[LeftBracketingBar]"
- u
- refx
- ❘
- "\[RightBracketingBar]"
- -
- V
- m
- ;
- u
- ref
-
- 2
- =
- ❘
- "\[LeftBracketingBar]"
- u
- refx
- ❘
- "\[RightBracketingBar]"
- k
- ;
- and
- u
- ref
-
- 3
- =
- ❘
- "\[LeftBracketingBar]"
- u
- refx
- ❘
- "\[RightBracketingBar]"
- ;
- where Urefx is a total input of the plurality of reference signals, and k is an output of a proportional integration (PI) regulator.
A system comprising:
- a DC source;
- and
- an inverter coupled to the DC source, the inverter including seven levels comprising:
- a neutral point clamped inverter;
- a half-bridge, wherein the neutral point clamped inverter and the half-bridge include a plurality of power switches,
- a plurality of DC-link capacitors that synthesize seven output voltage levels;
- wherein the neutral pointed clamped inverter includes at least some of the plurality of power switches and is operated at a switching frequency with a first voltage stress level;
- and
- wherein the half-bridge includes at least some other of the plurality of power switches coupled to the neutral point clamped inverter and operated at a fundamental frequency with a second voltage stress, the second voltage stress being higher than the first voltage stress level;
- and
- a voltage balance controller configured to utilize a plurality of reference signals and a carrier signal;
- wherein the carrier signal is a triangular carrier signal;
- wherein the plurality of reference signals are defined by:
- u
- ref
- =
- 2
-
- m
-
- V
- m
-
- sin
-
- (
- 2
-
- π
-
- f
- m
-
- t
- )
- ;
- where m is a modulation index, fm is the fundamental frequency of the inverter, Vm is an amplitude of one of the plurality of reference signals, and t is a charging time;
- wherein the amplitude is defined by:
- u
- ref
-
- 1
- =
- ❘
- "\[LeftBracketingBar]"
- u
- refx
- ❘
- "\[RightBracketingBar]"
- -
- V
- m
- ;
- u
- ref
-
- 2
- =
- ❘
- "\[LeftBracketingBar]"
- u
- refx
- ❘
- "\[RightBracketingBar]"
- k
- ;
- and
- u
- ref
-
- 3
- =
- ❘
- "\[LeftBracketingBar]"
- u
- refx
- ❘
- "\[RightBracketingBar]"
- ;
- where Urefx is a total input of the plurality of reference signals, and k is an output of a proportional integration (PI) regulator.
Dependencies are inferred from the claim text.