Inrush current limiting circuit

An inrush current limiter circuit for a rectifier, wherein the inrush current limiter circuit provides a flow of a current between a rectifying part of the rectifier and a filter capacitance, comprising:

• a power stage comprising a power stage resistor and a power stage transistor disposed in parallel circuit arrangement to the power stage resistor;
• wherein the power stage resistor is configured to conduct an amount of the current depending on a state of the power stage transistor, wherein the power stage transistor is configured to conduct an amount of the current depending on a charging of a gate capacitance of the power stage transistor;
• and
• a re-trigger circuit configured to detect a DC bus voltage jump and to turn the transistor off when the re-trigger circuit detects the DC bus voltage jump,
• wherein the re-trigger circuit comprises a comparator configured to compare a delayed voltage based on a DC bus voltage with an un-delayed voltage based on the DC bus voltage, and to determine that the DC bus voltage jump has occurred when the comparison results in a difference voltage higher than a threshold value.

A rectifier, comprising:

• an inrush current limiter circuit with a power stage, the power stage comprising:
• a power stage comprising a power stage resistor and a power stage transistor disposed in parallel circuit arrangement to the power stage resistor;
• wherein the power stage resistor is configured to conduct an amount of the current depending on a state of the power stage transistor;
• and
• wherein the power stage transistor is configured to conduct an amount of the current depending on a charging of a gate capacitance of the power stage transistor, and further comprising a re-trigger circuit configured to detect a positive DC bus voltage jump and to reset and turn the transistor off when the re-trigger circuit detects the positive DC bus voltage jump.

A method for limiting an inrush current of a rectifier flowing between a rectifying part of the rectifier and a filter capacitance, comprising:

• providing a power stage having a power stage resistor and a power stage transistor disposed in parallel circuit connection to the power stage resistor;
• conducting by the power stage resistor an amount of the current in dependence on the state of the power stage transistor;
• conducting by the power stage transistor an amount of the current in dependence on a charging of a gate capacitance of the power stage transistor;
• re-triggering the power stage transistor by a re-trigger circuit configured to detect a positive DC bus voltage jump and to reset and turn the transistor off when the re-trigger circuit detects the positive DC bus voltage jump.