Semiconductor device and method of manufacturing the same

A memory device, comprising:

• a memory cell comprising:
• a programming transistor;
• and
• a first reading transistor in electrical connection with the programming transistor in series and in electrical connection with a bit line;
• wherein the memory cell is formed in one of a plurality of first metallization layers formed over a first surface of a substrate;
• wherein the memory cell is operatively coupled to a subset of a plurality of peripheral transistors formed along the first surface of the substrate;
• and
• wherein the bit line is formed in one of a plurality of second metallization layers formed over a second surface of the substrate opposite to the first surface.

A method for forming memory devices, comprising:

• forming a plurality of peripheral transistors along a first surface of a substrate;
• forming a plurality of first metallization layers disposed over the first surface;
• forming a plurality of memory cells in one or more of the plurality of first metallization layers, wherein each of the plurality of memory cells is operatively coupled to a subset of the peripheral transistors and comprises a programming transistor and at least a reading transistor;
• forming a plurality of second metallization layers disposed over a second surface of the substrate opposite to the first surface;
• and
• coupling a source/drain terminal of the reading transistor of each of the memory cells to a bit line formed in a corresponding one of the second metallization layers.