Methods and systems for writing state into superconducting circuits with integrated semiconductor-based circuits

A write circuit for selectively writing state into a plurality of superconducting memory cells in a random-access memory, the write circuit comprising:

• a first non-superconducting write circuit, the first non-superconducting write circuit being connected to one or more first write lines, each of the first write lines being configured to convey a first write current, the first non-superconducting write circuit including at least a first non-superconducting switch circuit configured to selectively apply the first write current to at least a given one of the first write lines for writing state into one or more corresponding memory cells of the plurality of superconducting memory cells associated with the given one of the first write lines in response to first non-superconducting control signal;
• a second non-superconducting write circuit, the second non-superconducting write circuit being connected to one or more second write lines, each of the second write lines being configured to convey a second write current, the second write circuit including at least a second non-superconducting switch circuit configured to selectively apply the second write current to at least a given one of the second write lines for selecting one or more corresponding memory cells of the plurality of superconducting memory cells associated with the given one of the second write lines in response to a second non-superconducting control signal;
• a conversion circuit, the conversion circuit being configured to receive a superconducting encoded write address and/or a superconducting data signal, and to generate the first and/or second non-superconducting control signals as a function of the superconducting encoded write address and/or the superconducting data signal.

A method for writing state into a plurality of memory circuits, each of the memory circuits including a plurality of superconducting memory cells, the method comprising:

• providing at least one non-superconducting control signal for selecting at least one memory circuit of the plurality of memory circuits for a write operation;
• sourcing at least one current for writing one or more memory cells of the plurality of superconducting memory cells in the selected at least one memory circuit to a prescribed logic state;
• reading a stored state of the one or more memory cells of the plurality of superconducting memory cells in the selected at least one memory circuit using superconducting circuits in the at least one memory circuit;
• transferring the state of the one or more memory cells of the plurality of superconducting memory cells read from the selected at least one memory circuit to an evaluation circuit;
• verifying that the stored state of the one or more memory cells read from the selected at least one memory circuit is the same as the prescribed logic state intended to be written into the one or more memory cells.