Semiconductor device with commands delayed using a delay line

An apparatus comprising:

• a first circuit configured to generate a first signal in which a first toggle pattern, a command pattern, and a second toggle pattern appear in this order;
• a second circuit configured to mask the first signal to generate a second signal;
• a third circuit configured to mask the second signal to generate a third signal,
• wherein the second circuit is configured to start masking the first signal at a first time preceding an end time of the first toggle pattern and stop masking the first signal at a second time between the end time of the first toggle pattern and the command pattern, and
• wherein the third circuit is configured to stop masking the second signal at a third time between the first time and the second time and start masking the second signal at a fourth time between the command pattern and a start time of the second toggle pattern.

An apparatus comprising:

• a first circuit configured to generate a first signal including a command pattern and a plurality of dummy patterns;
• a second circuit configured to generate a second signal by delaying the first signal;
• and
• a third circuit configured to mask the second signal to remove the plurality of dummy patterns to generate a third signal,
• wherein the third circuit is configured to stop masking the second signal when the command pattern included in the first signal is brought into an active state, and start masking the second signal when a first period is elapsed after the command pattern included in the first signal is brought into an inactive state.