Display device having a voltage provider for generating a gate-on voltage and a kickback voltage
AssigneeSamsung Display Co., Ltd.
InventorsSang Hyun Lee, Si Duk Sung, Dae-Sik Lee
Life of this patent
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Abstract
The current disclosure relates to a display device including a display panel including a plurality of pixels, and a plurality of gate lines and a plurality of data lines connected to the plurality of pixels, a gate driver applying a gate signal to the plurality of gate lines, a data driver applying a data signal to the plurality of data lines, and a voltage provider configured to generate a gate-on voltage that is gradually changed in one frame and a kickback voltage that is gradually changed in one frame to transmit the gate-on voltage and the kickback voltage to the gate driver.
Claims4
A display device comprising:
- a display panel including a plurality of pixels, and a plurality of gate lines and a plurality of data lines connected to the plurality of pixels;
- a gate driver applying a gate signal to the plurality of gate lines;
- a data driver applying a data signal to the plurality of data lines;
- and
- a circuit board including a voltage provider and a signal channel connecting the voltage provider to the gate driver,
- wherein the gate driver receives, through the signal channel, a gate-on voltage that is gradually changed within one frame and a kickback voltage that is gradually changed within one frame from the voltage provider, and applies the gate-on voltage and the kickback voltage to the plurality of gate lines, and
- wherein the gate-on voltage gradually increases and is applied to the plurality of gate lines including a first gate line having a shortest distance through which the gate signal is applied and a n-th gate line, where n is an integer greater than one, having a longest distance through which the gate signal is applied,
- a kickback time in which the kickback voltage is applied is different for at least one of the plurality of gate lines,
- each of the gate-on voltage and the kickback voltage has a constant level before a gate start signal is applied during a blank period, and a level of the gate-on voltage gradually increases during an active period within one frame, and
- the kickback time at which the kickback voltage is applied to each of the gate lines is determined by Equation below:
- t
-
- (
- i
- )
- =
- (
- 1
- ±
- (
- i
- -
- 1
- )
-
- γ
- )
-
- tref
- ,
- [
- Equation
- ]
- where t(i) is the kickback time of i-th gate line, γ is any number which is greater than 0 and less than 1, and tref is a reference time.
Dependencies are inferred from the claim text.