Method for managing the isolation of resources of a system-on-chip, and corresponding system-on-chip
AssigneeSTMicroelectronics (Grand Ouest) SAS
InventorLoic Pallardy
Life of this patent
Estimating the term…
Abstract
The system-on-chip includes at least one master device, at least one slave resource, an interconnection bus including an error notification channel, and a resource isolation system including, for each resource, a protection circuit configured to block or transmit transactions addressed to the resource via the interconnection bus, according to access rights of the resource and the transaction. The protection circuit is capable of generating a notification signal on the error notification channel of the interconnection bus in case of blockage of a transaction.
Claims20
A system-on-chip (SoC), comprising:
- a primary circuit;
- an auxiliary resource;
- an interconnection bus comprising an error notification channel, the interconnection bus configured to couple the primary circuit to the auxiliary resource;
- and
- a resource isolation system comprising a protection circuit for the auxiliary resource, the protection circuit configured to:
- transmit or block a transaction addressed to the auxiliary resource via the interconnection bus based on a comparison of security domain attributes of the transaction against security domain attributes stored in a per-resource configuration register associated with the auxiliary resource as access rights of the auxiliary resource, and
- generate, on the error notification channel, by the protection circuit independently of the auxiliary resource, a notification signal addressed to the primary circuit via routing mechanisms of the interconnection bus in response to the protection circuit blocking the transaction.
A method, comprising:
- transmitting or blocking, by a protection circuit of a resource isolation system in a system-on-chip (SoC), a transaction addressed to an auxiliary resource of the SoC via an interconnection bus of the SoC based on a comparison of security domain attributes of the transaction against security domain attributes stored in a per-resource configuration register associated with the auxiliary resource as access rights of the auxiliary resource, the SoC further comprising a primary circuit coupled to the auxiliary resource via the interconnection bus, the protection circuit associated with the auxiliary resource;
- and
- generating, on an error notification channel of the interconnection bus by the protection circuit independently of the auxiliary resource, a notification signal addressed to the primary circuit via routing mechanisms of the interconnection bus in response to the protection circuit blocking the transaction.
A device comprising a system-on-chip (SoC), the SoC comprising:
- an auxiliary resource;
- an interconnection bus comprising an error notification channel, the interconnection bus coupled to the auxiliary resource;
- and
- a resource isolation system comprising a protection circuit for the auxiliary resource, the protection circuit configured to:
- transmit or block a transaction addressed to the auxiliary resource via the interconnection bus based on a comparison of security domain attributes of the transaction against security domain attributes stored in a per-resource configuration register associated with the auxiliary resource as access rights of the auxiliary resource, and
- generate, on the error notification channel, by the protection circuit independently of the auxiliary resource, a notification signal addressed to a primary circuit coupled to the auxiliary resource via routing mechanisms of the interconnection bus in response to the protection circuit blocking the transaction.
Dependencies are inferred from the claim text.