Floating point pre-alignment structure for computing-in-memory applications and computing method thereof

A computing method of a floating point pre-alignment structure for computing-in-memory applications, comprising:

• performing a voltage level applying step, wherein the voltage level applying step comprises applying a plurality of voltage levels to a plurality of exponent input signals, a plurality of original input exponents, a plurality of original weight exponents and a plurality of original input mantissas;
• and
• performing a computing step to configure a time domain exponent computing block to compute the original input exponents and the original weight exponents, wherein the computing step comprises:
• performing a first computing step, wherein the first computing step comprises configuring a time domain exponent computing array to delay the exponent input signals by a plurality of delay time periods to generate a plurality of exponent delay output signals, and each of the delay time periods is determined by adding one of the original input exponents and one of the original weight exponents;
• performing a second computing step, wherein the second computing step comprises configuring a winner-take-all circuit to find out one of the exponent delay output signals as a maximum exponent adding signal, and the one of the exponent delay output signals is corresponding to a minimum one of the delay time periods;
• performing a third computing step, wherein the third computing step comprises configuring a dynamic logic block to compare the maximum exponent adding signal with the exponent delay output signals to generate a plurality of flags;
• and
• performing a fourth computing step, wherein the fourth computing step comprises configuring an input mantissa pre-align block to receive the original input mantissas and shift the original input mantissas according to the flags to generate a plurality of weighted input mantissas, and sparsity of the weighted input mantissas is greater than sparsity of the original input mantissas.

A floating point pre-alignment structure for computing-in-memory applications, comprising:

• a time domain exponent computing block configured to compute a plurality of original input exponents and a plurality of original weight exponents to generate a plurality of flags, wherein each of the flags is determined by adding one of the original input exponents and one of the original weight exponents;
• and
• an input mantissa pre-align block connected to the time domain exponent computing block, wherein the input mantissa pre-align block is configured to receive a plurality of original input mantissas and shift the original input mantissas according to the flags to generate a plurality of weighted input mantissas, and sparsity of the weighted input mantissas is greater than sparsity of the original input mantissas;
• wherein each of the flags has a negative correlation with a sum of the one of the original input exponents and the one of the original weight exponents.