Atomic execution of processing-in-memory operations
AssigneeAdvanced Micro Devices, Inc.
InventorsAlexandru Dutu, Sooraj Puthoor
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AssigneeAdvanced Micro Devices, Inc.
InventorsAlexandru Dutu, Sooraj Puthoor
Estimating the term…
Scheduling processing-in-memory transactions in systems with multiple memory controllers is described. In accordance with the described techniques, an addressing system segments operations of a transaction into multiple microtransactions, where each microtransaction includes a subset of the transaction operations that are scheduled by a corresponding one of the multiple memory controllers. Each transaction, and its associated microtransactions, is assigned a transaction identifier based on a current counter value maintained at the multiple memory controllers, and the multiple memory controllers schedule execution of microtransactions based on associated transaction identifiers to ensure atomic execution of operations for a transaction without interruption by operations of a different transaction.
A system comprising:
A method comprising:
A device comprising:
Dependencies are inferred from the claim text.