Storage device and storage system including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKwanwoo Noh, Sungho Seo, Yongwoo Jeong, Dongwoo Nam, Myungsub Shin, Hyunkyu Jang
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Abstract
A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.
Claims20
A storage device comprising:
- a nonvolatile memory;
- a controller coupled to the nonvolatile memory;
- and
- an interconnect circuitry coupled to the controller,
- wherein the interconnect circuitry comprises:
- a reference clock counter configured to generate a reference clock count value by counting a number of clocks in a reference clock signal received from a host;
- and
- a system clock counter configured to generate a system clock count value by counting a number of clocks in a system clock signal of the storage device,
- wherein the storage device is configured to:
- determine a reference clock frequency based on a ratio of the reference clock count value and the system clock count value, and
- perform a link startup process with the host according to the reference clock frequency, during initialization and/or booting of the storage device.
A storage device comprising:
- a nonvolatile memory;
- a controller coupled to the nonvolatile memory;
- and
- an interconnect circuitry coupled to the controller,
- wherein the interconnect circuitry comprises:
- a reference clock counter configured to generate a reference clock count value by counting a number of clocks in a reference clock signal received from a host;
- and
- a system clock counter configured to generate a system clock count value by counting a number of clocks in a system clock signal of the storage device,
- wherein the storage device is configured to:
- determine a reference clock frequency based on a ratio of the reference clock count value and the system clock count value, and
- in response to the reference clock frequency changing from a first reference clock frequency to a second reference clock frequency in a linkup state between the host and the storage device, dynamically change a speed gear between the host and the storage device according to the second reference clock frequency.
A storage device comprising:
- a nonvolatile memory;
- a controller coupled to the nonvolatile memory;
- and
- an interconnect circuitry coupled to the controller,
- wherein the interconnect circuitry comprises:
- a reference clock counter configured to generate a reference clock count value by counting a number of clocks in a reference clock signal received from a host;
- and
- a system clock counter configured to generate a system clock count value by counting a number of clocks in a system clock signal of the storage device,
- wherein the storage device is configured to:
- determine a reference clock frequency based on a ratio of the reference clock count value and the system clock count value, and
- perform a link startup process with the host in a high-speed mode based on the reference clock frequency, without receiving information about the reference clock frequency of the reference clock signal from the host, and
- wherein the storage device is connected to the host according to an interface protocol defined in universal flash storage (UFS) standards.
Dependencies are inferred from the claim text.