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US 12,740,384 B2Granted
Metal interconnect structure and method for fabricating the same
AssigneeUnited Microelectronics Corp.
InventorsDa-Jun Lin, Bin-Siang Tsai
Life of this patent
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Abstract
A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a trench in the dielectric layer; forming a first liner in the trench, wherein the first liner comprises Co—Ru alloy; forming a metal layer on the first liner; and planarizing the metal layer and the first liner to form a metal interconnection.
Claims8
A method for fabricating semiconductor device, comprising:
- forming a dielectric layer on a substrate;
- forming a trench in the dielectric layer;
- forming a second liner in the trench;
- forming a third liner on the second liner, wherein the second liner and the third liner comprise different thicknesses and different materials;
- performing an anneal process to transform the second liner and the third liner into a first liner in the trench, wherein the first liner comprises Co—Ru alloy;
- forming a metal layer on the first liner, wherein the Co—Ru alloy contacts the metal layer directly;
- and
- planarizing the metal layer and the first liner to form a metal interconnection.
5 more elements
Dependencies are inferred from the claim text.