Memory cell, semiconductor device including memory cell, and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKai-Tai Chang, Tung-Ying Lee
Life of this patent
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Abstract
A semiconductor device includes a substrate and a memory array disposed over the substrate. The memory array includes at least one film stack disposed over the substrate, a memory layer disposed over the substrate and covering a sidewall and a top of the film stack, a selector layer disposed on the memory layer, and at least one word line disposed on the selector layer and extending transversely with respect to the film stack. The film stack includes conductive layers and insulating layers alternately arranged, each conductive layer includes a first material and a second material in direct contact with each other, and a resistivity value of the second material is lower than a resistivity value of the first material.
Claims20
A semiconductor device, comprising:
- a substrate;
- and
- a memory array disposed over the substrate, the memory array comprising:
- at least one film stack disposed over the substrate, wherein the at least one film stack comprises conductive layers and insulating layers alternately arranged, each conductive layer comprises a first material and a second material in direct contact with each other, and a resistivity value of the second material is lower than a resistivity value of the first material;
- a memory layer, disposed over the substrate and covering a sidewall and a top of the at least one film stack;
- a selector layer disposed on the memory layer;
- and
- at least one word line, disposed on the selector layer and extending transversely with respect to the at least one film stack.
A semiconductor device, comprising:
- a memory array disposed over a substrate, the memory array comprising:
- a first metal layer;
- a second metal layer being in contact with the first metal layer and comprising a material different from a material of the first metal layer, the second metal layer laterally extending out from an edge of the first metal layer;
- an insulating layer overlying the first metal layer;
- a memory layer conformally covering sides of the first and second metal layers;
- a selector layer overlying the memory layer;
- and
- a word line overlying the selector layer.
A manufacturing method of a semiconductor device, comprising:
- depositing a first metallic material having a first resistivity;
- depositing a second metallic material having a second resistivity higher than the first resistivity, the second metallic material being deposited in direct contact with the first metallic material;
- depositing an insulating material over the second metallic material;
- patterning the first metallic material, the second metallic material, and the insulating material, so that the second metallic material is recessed with respect to side edges of the first metallic material and the insulating material;
- conformally depositing a memory material over the patterned first metallic material, second metallic material, and insulating material;
- conformally depositing a selector material over the memory material;
- and
- depositing a third metallic material over the selector material.
Dependencies are inferred from the claim text.