Semiconductor device and method of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYuna Gil, Sumin Yu
Life of this patent
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Abstract
A semiconductor device includes a word line extending in a first direction. A bit line extends on the word line in a second direction intersecting the first direction. A memory cell is disposed between the word line and the bit line. The memory cell includes a lower electrode, a selection element, and an upper electrode sequentially disposed on the word line. A filling pattern is on a side surface of the memory cell. An etch stop pattern includes an insulating material between the filling pattern and the bit line. A lower surface of the etch stop pattern is positioned at a higher level than a level of a lower surface of the upper electrode.
Claims20
A semiconductor device comprising:
- a word line extending in a first direction;
- a bit line extending on the word line in a second direction intersecting the first direction;
- a memory cell disposed between the word line and the bit line, the memory cell including a lower electrode, a selection element, and an upper electrode sequentially disposed on the word line;
- a filling pattern on a side surface of the memory cell;
- and
- an etch stop pattern including an insulating material between the filling pattern and the bit line,
- wherein a lower surface of the etch stop pattern is positioned at a higher level than a level of a lower surface of the upper electrode.
A semiconductor device comprising:
- a word line extending in a first direction;
- a bit line extending on the word line in a second direction intersecting the first direction;
- a memory cell disposed between the word line and the bit line, the memory cell including a lower electrode, a selection element, and an upper electrode sequentially disposed on the word line;
- a filling pattern on a side surface of the memory cell;
- and
- an etch stop pattern including an insulating material, the etch stop pattern is disposed between the filling pattern and the bit line,
- wherein the filling pattern has a first upper surface below the bit line, and
- wherein the first upper surface of the filling pattern is positioned at a higher level than a level of a lower surface of the upper electrode.
A semiconductor device comprising:
- a word line extending in a first direction;
- a bit line extending on the word line in a second direction intersecting the first direction;
- a memory cell disposed between the word line and the bit line, the memory cell including a lower electrode, a selection element, and an upper electrode sequentially disposed on the word line;
- a filling pattern on a side surface of the memory cell;
- and
- an etch stop pattern including an insulating material between the filling pattern and the bit line,
- wherein the upper electrode is in direct contact with an upper surface of the selection element and a lower surface of the bit line, and
- wherein a lower surface of the etch stop pattern is positioned at a higher level than a level of a lower surface of the upper electrode.
Dependencies are inferred from the claim text.