Substrate modifications to suppress correlated errors in multiqubit arrays
AssigneeWisconsin Alumni Research Foundation
InventorsRobert Francis McDermott, Mark A. Eriksson
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Abstract
Qubit arrays having substrates that are engineered to suppress correlated dephasing errors, correlated relaxation errors, or both are provided. Also provided are quantum circuits incorporating the qubit arrays and quantum computers incorporating the quantum circuits. The engineered substrates can be used to suppress noise and correlated errors in any qubit array that suffers from charge fluctuations or other noise that creates a non-equilibrium, error-producing state in the qubit array.
Claims20
A qubit array comprising at least two qubits on or in a crystalline substrate, the crystalline substrate having a plurality of engineered defects in its crystal structure, wherein the engineered defects form traps or recombination centers for free charge carriers in the crystal structure to suppress correlated dephasing errors or correlated relaxation errors in the qubits of the qubit array.
A qubit array comprising at least two qubits on or in a substrate, the substrate having a plurality of geometric features defined therein, wherein the geometric features increase a surface area of interfaces at which free charge carriers are trapped or recombine and/or from which phonons scatter diffusively to suppress correlated dephasing errors or correlated relaxation errors in the qubits of the qubit array.
Dependencies are inferred from the claim text.