Image sensor and electronic system including the same

An image sensor comprising:

• a substrate having a pixel region;
• an active region provided in the pixel region, the active region having an edge portion in a direction perpendicular to a channel direction in the active region, and the active region having an asymmetric fin region configured by a cutout space at the edge portion of the active region and shifted from a center of the active region;
• and
• a source follower transistor provided in the pixel region,
• wherein the source follower transistor comprises:
• a gate electrode comprising:
• a horizontal gate portion provided on the active region and having a first surface facing a frontside surface of the substrate;
• and
• a vertical gate portion filling the cutout space and having a second surface facing a fin sidewall, among a plurality of fin sidewalls of the asymmetric fin region, and a third surface at a vertical level lower than a vertical level of the frontside surface of the substrate;
• a source region and a drain region formed in the active region, the source region being formed on a first side of the gate electrode and the drain region formed on a second side of the gate electrode opposite to the first side;
• and
• a gate dielectric layer provided between the active region and the gate electrode, the gate dielectric layer comprising portions in contact with the third surface of the vertical gate portion and the fin sidewall, and
• wherein a first distance from the asymmetric fin region to the source region in the channel direction in the active region is smaller than a second distance from the asymmetric fin region to the drain region in the channel direction.

An electronic system comprising:

• at least one camera including an image sensor;
• and
• a processor configured to process image data received from the at least one camera,
• wherein the image sensor comprises:
• a substrate having a pixel region;
• an active region provided in the pixel region, the active region having an edge portion in a direction perpendicular to a channel direction in the active region, and the active region having an asymmetric fin region configured by a cutout space at the edge portion of the active region and shifted from a center of the active region;
• and
• a transistor provided in the pixel region,
• wherein the transistor comprises:
• a gate electrode comprising a horizontal gate portion provided on the active region and having a first surface facing an upper surface of the active region, and a vertical gate portion filling the cutout space and having a second surface facing a fin sidewall among a plurality of fin sidewalls of the asymmetric fin region;
• a source region and a drain region formed in the active region, the source region being formed on a first side of the gate electrode and the drain region formed on a second side of the gate electrode opposite to the first side;
• and
• a gate dielectric layer between the active region and the gate electrode, and
• wherein a first distance between the source region and the asymmetric fin region is different from a second distance between the drain region and the asymmetric fin region.