Transient voltage suppressor structure having multiple discharging paths

A transient voltage suppressor structure having multiple discharging paths, comprising:

• a semiconductor substrate of a first conductivity type;
• an epitaxial layer of a second conductivity type, which is formed on the semiconductor substrate of the first conductivity type, wherein the second conductivity type is opposite to the first conductivity type;
• a doped well region of the first conductivity type, which is formed in the epitaxial layer of the second conductivity type, wherein a first heavily doped region of the second conductivity type, a second heavily doped region of the second conductivity type, and a third heavily doped region of the first conductivity type are further disposed in the doped well region of the first conductivity type;
• and wherein the second heavily doped region of the second conductivity type is electrically connected to a first pin, the first heavily doped region of the second conductivity type is electrically connected to a fourth heavily doped region of the second conductivity type, and the fourth heavily doped region of the second conductivity type and a fifth heavily doped region of the first conductivity type are commonly disposed in the epitaxial layer of the second conductivity type, where the fifth heavily doped region of the first conductivity type is electrically connected to a second pin;
• and wherein a sixth heavily doped region of the second conductivity type is further disposed in the epitaxial layer of the second conductivity type and the sixth heavily doped region of the second conductivity type in the epitaxial layer of the second conductivity type is electrically connected in common with the third heavily doped region of the first conductivity type in the doped well region of the first conductivity type;
• and
• a plurality of isolation trench, being disposed adjacent to the fifth heavily doped region of the first conductivity type, adjacent to the sixth heavily doped region of the second conductivity type and between the first heavily doped region of the second conductivity type and the fourth heavily doped region of the second conductivity type for electrical isolations, wherein a depth of each of the plurality of isolation trench is greater than a depth of the epitaxial layer of the second conductivity type.