Semiconductor device

A semiconductor device comprising:

• a first transistor structure on a substrate, the first transistor structure comprising:
• first channel layers spaced apart from each other;
• a first gate electrode surrounding the first channel layers;
• and
• a first source/drain region connected to the first channel layers on a first side of the first gate electrode;
• and
• a second source/drain region connected to the first channel layers on a second side of the first gate electrode that is opposite to the first side of the first gate electrode, and,
• a second transistor structure on the first transistor structure, the second transistor structure comprising:
• second channel layers spaced apart from each other;
• a second gate electrode surrounding the second channel layers;
• a third source/drain region connected to the second channel layers on a first side of the second gate electrode;
• and
• a fourth source/drain region connected to the second channel layers on a second side of the second gate electrode that is opposite to the first side of the second gate electrode,
• wherein at least one channel layer of the first channel layers and the second channel layers comprises a semiconductor layer comprising an impurity,
• wherein the semiconductor layer comprises a region in which a concentration of the impurity changes based on a height in a vertical direction, perpendicular to an upper surface of the substrate, and
• wherein the impurity comprises carbon (C).

A semiconductor device comprising:

• an active fin on a substrate extending in a first direction;
• first channel layers on the active fin and spaced apart from each other;
• a first gate electrode surrounding the first channel layers and extending in a second direction that intersects the first direction;
• a first source/drain region connected to the first channel layers on a first side of the first gate electrode;
• a second source/drain region connected to the first channel layers on a second side of the first gate electrode that is opposite to the first side of the first gate electrode;
• second channel layers vertically overlapping the first channel layers and spaced apart from each other;
• a second gate electrode surrounding the second channel layers, extending in the second direction, and vertically overlapping the first gate electrode;
• a third source/drain region connected to the second channel layers on a first side of the second gate electrode;
• and
• a fourth source/drain region connected to the second channel layers on a second side of the second gate electrode that is opposite to the first side of the second gate electrode,
• wherein the first channel layers comprise a first semiconductor layer comprising a first impurity, the first semiconductor layer being an uppermost channel layer among the first channel layers,
• wherein the second channel layers comprise a second semiconductor layer comprising a second impurity, the second semiconductor layer being a lowermost channel layer among the second channel layers,
• wherein an upper surface or a lower surface of the first semiconductor layer comprises the first impurity in a first concentration,
• wherein a central portion of the first semiconductor layer comprises the first impurity in a second concentration that is lower than the first concentration,
• wherein an upper surface or a lower surface of the second semiconductor layer comprises the second impurity in a third concentration,
• wherein a central portion of the second semiconductor layer comprises the second impurity in a fourth concentration that is lower than the third concentration, and
• wherein at least one of the first impurity and the second impurity comprises carbon (C).