US 12,740,136 B2Granted

Semiconductor device structure having gate dielectric layers with different dielectric compositions and method of forming the same

AssigneeMediatek Inc.

InventorsYu-Lin Yang, Ming-Cheng Lee, Yuan-Fu Chung

Life of this patent

Estimating the term…

Loading patent…

Abstract

A semiconductor device structure includes a semiconductor substrate, a first device formed in the first region of the semiconductor substrate and a second device formed in the second region of the semiconductor substrate. The first device includes a first gate structure on the semiconductor substrate. The first gate structure includes a first gate dielectric layer on the semiconductor substrate and a first gate layer on the first gate dielectric layer. The second device includes a second gate structure on the semiconductor substrate. The second gate structure includes a second gate dielectric layer on the semiconductor substrate and a second gate layer on the second gate dielectric layer. The first gate dielectric layer of the first device and the second gate dielectric layer of the second device have different dielectric material compositions.

Claims35

Dependent claims

A semiconductor device structure, comprising:

a semiconductor substrate;
a first device formed in a first region of the semiconductor substrate, the first device comprising a first gate structure on the semiconductor substrate, wherein the first gate structure comprises:
a first gate dielectric layer on the semiconductor substrate, wherein the first gate dielectric layer is a single dielectric material layer;
and
a first gate layer on the first gate dielectric layer;
and
a second device formed in a second region of the semiconductor substrate, the second device comprising a second gate structure on the semiconductor substrate, wherein the second gate structure comprises:
a second gate dielectric layer on the semiconductor substrate;
and
a second gate layer on the second gate dielectric layer,
wherein the first gate dielectric layer of the first device and the second gate dielectric layer of the second device have different dielectric material compositions,
wherein the second gate dielectric layer comprises a hafnium oxide (HfOx) layer and a lanthanum oxide (LaOx) layer stacked in sequence over the substrate;
a third device formed in a third region of the semiconductor substrate, the third device comprising a third gate structure on the semiconductor substrate, wherein the third gate structure comprises:
a third gate dielectric layer on the semiconductor substrate;
and
a third gate layer on the third gate dielectric layer,
wherein the third gate dielectric layer and the first gate dielectric layer have different dielectric material compositions, and the third gate dielectric layer and the second gate dielectric layer have different dielectric material compositions,
wherein the third gate dielectric layer comprises a hafnium oxide (HfOx) layer, a first lanthanum oxide (LaOx) layer, and a second lanthanum oxide (LaOx) layer stacked in sequence over the substrate.

15 more elements

A method of forming a semiconductor device structure, comprising:

providing a semiconductor substrate having a first region and a second region;
and
forming a first device in the first region and a second device in the second region, wherein the first device comprises a first gate structure on the semiconductor substrate, the second device comprises a second gate structure on the semiconductor substrate, and forming the first gate structure comprises:
forming a first gate dielectric layer on the semiconductor substrate;
and
forming a first gate layer on the first gate dielectric layer;
and
forming the second gate structure comprises:
forming a second gate dielectric layer on the semiconductor substrate;
and
forming a second gate layer on the second gate dielectric layer,
wherein the first gate dielectric layer of the first device and the second gate dielectric layer of the second device have different dielectric material compositions;
forming a third device in a third region of the semiconductor substrate, the third device comprising a third gate structure on the semiconductor substrate, wherein forming the third gate structure comprises:
forming a third gate dielectric layer on the semiconductor substrate;
and
forming a third gate layer on the third gate dielectric layer,
wherein the third gate dielectric layer and the first gate dielectric layer have different dielectric material compositions, and the third gate dielectric layer and the second gate dielectric layer have different dielectric material compositions,
wherein the third gate dielectric layer comprises a hafnium oxide (HfOx) layer, a first lanthanum oxide (LaOx) layer, and a second lanthanum oxide (LaOx) layer stacked in sequence over the substrate.

15 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/816,749Filed 2 Aug 2022 · us provisional application
Priority: 2 Sep 2021
Published: US 2023/0061138 A12 Mar 2023
Granted: 15 Sep 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

H10D 84/83
Of only field-effect components: of only insulated-gate FETs [IGFET]
H10D 64/514
For igfets: characterised by the insulating layers
H10D 64/685
Having a compositional variation, e.g. multilayered: being perpendicular to the channel plane
H10D 64/691
Characterised by the insulator, e.g. by the gate insulator: comprising metallic compounds, e.g. metal oxides or metal silicates