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US 12,740,132 B2Granted
Semiconductor device with source/drain contact MOL cut structure
AssigneeInternational Business Machines Corporation
InventorsMin Gyu Sung, Tao Li, Ruilong Xie, Nicolas Jean Loubet
Life of this patent
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Abstract
A semiconductor device is provided that includes a source/drain contact middle-of-the-line (MOL) cut structure separating two adjacent frontside source/drain contact structures from each other in which one of the separated frontside source/drain contact structures is merged to a via-to-backside power rail (VBPR) structure that is in electrical contact with a backside power distribution network.
Claims20
A semiconductor device comprising:
- a first transistor located in a first active area of a semiconductor device layer, the first transistor comprising a first gate structure and a first source/drain region located on each side of the first gate structure;
- a second transistor located in a second active area of the semiconductor device layer, the second transistor comprising a second gate structure and a second source/drain region located on each side of the second gate structure;
- a first frontside source/drain contact structure contacting one of the first source/drain regions of the first transistor;
- a second frontside source/drain contact structure contacting one of the second source/drain regions of the second transistor that is adjacent to the first source/drain region including the first frontside source/drain contact structure;
- a dielectric gate cap located on the first gate structure and the second gate structure;
- a source/drain contact middle-of-the-line (MOL) cut structure separating the first frontside source/drain contact structure from the second frontside source/drain contact structure;
- a via-to-backside power rail (VBPR) structure located in a non-active device area that is located between the first active area and the second active area and in electrical contact with the first frontside source/drain contact structure;
- a gate cut dielectric spacer located on each side of the VBPR structure;
- and
- a backside power rail in electrical contact with the VBPR structure.
7 more elements
A semiconductor device comprising:
- a first transistor located in a first active area of a semiconductor device layer, the first transistor comprising a first gate structure and a first source/drain region located on each side of the first gate structure;
- a second transistor located in a second active area of the semiconductor device layer, the second transistor comprising a second gate structure and a second source/drain region located on each side of the second gate structure;
- a first frontside source/drain contact structure contacting one of the first source/drain regions of the first transistor;
- a second frontside source/drain contact structure contacting one of the second source/drain regions of the second transistor that is adjacent to the first source/drain region including the first frontside source/drain contact structure;
- a dielectric gate cap located on the first gate structure and the second gate structure;
- a source/drain contact middle-of-the-line (MOL) cut structure separating the first frontside source/drain contact structure from the second frontside source/drain contact structure;
- a via-to-backside power rail (VBPR) structure located in a non-active device area that is located between the first active area and the second active area and in electrical contact with the first frontside source/drain contact structure;
- a gate cut dielectric spacer located on each side of the VBPR structure, wherein the gate cut dielectric spacer located adjacent to the first source/drain region that contacts the first frontside source/drain contact structure has a height that is greater than a height of the gate cut dielectric spacer located adjacent to the second source/drain region that contacts the second frontside source/drain contact structure;
- and
- a backside power rail in electrical contact with the VBPR structure.
7 more elements
A semiconductor device comprising:
- a first transistor located in a first active area of a semiconductor device layer, the first transistor comprising a first gate structure and a first source/drain region located on each side of the first gate structure;
- a second transistor located in a second active area of the semiconductor device layer, the second transistor comprising a second gate structure and a second source/drain region located on each side of the second gate structure;
- a first frontside source/drain contact structure contacting one of the first source/drain regions of the first transistor;
- a second frontside source/drain contact structure contacting one of the second source/drain regions of the second transistor that is adjacent to the first source/drain region including the first frontside source/drain contact structure;
- a dielectric gate cap located on the first gate structure and the second gate structure;
- a source/drain contact middle-of-the-line (MOL) cut structure separating the first frontside source/drain contact structure from the second frontside source/drain contact structure;
- a via-to-backside power rail (VBPR) structure located in a non-active device area that is located between the first active area and the second active area and in electrical contact with the first frontside source/drain contact structure;
- a gate cut dielectric spacer located on each side of the VBPR structure, wherein each gate cut dielectric spacer has a topmost surface that is located above a bottommost surface of the dielectric gate cap and each gate cut dielectric spacer has a topmost surface that is above a topmost surface of the first source/drain regions and the second source/drain regions;
- and
- a backside power rail in electrical contact with the VBPR structure.
7 more elements
Dependencies are inferred from the claim text.