Semiconductor device and method of manufacturing the same

A method of manufacturing a semiconductor device, comprising:

• providing a semiconductor structure including a plurality of active patterns that extend on a substrate in a first direction, a plurality of gate lines that intersect the plurality of active patterns and extend in a second direction that intersects the first direction, and a plurality of intergate insulating portions that overlap in a direction perpendicular to a surface of the substrate respective ones of the plurality of active patterns and are respectively between ones of the plurality of gate lines, wherein each of the plurality of gate lines includes a gate electrode and a gate capping layer on the gate electrode;
• forming a mask layer on the plurality of gate lines and the plurality of intergate insulating portions;
• forming an opening that exposes a cut region of the plurality of gate lines in the mask layer;
• forming a separation hole by removing a portion of the gate capping layer exposed by the opening using the mask layer;
• forming a pyrolysis material layer on the mask layer and in the separation hole;
• forming a pyrolysis material pattern in the separation hole by recessing the pyrolysis material layer, at a first temperature at which the pyrolysis material layer is decomposed;
• exposing a side wall portion of the separation hole by decomposing a portion of the pyrolysis material pattern;
• forming an etch stop layer on an upper surface of the mask layer and on the exposed side wall portion of the separation hole, at a second temperature at which the pyrolysis material pattern is decomposed, wherein exposing the side wall portion of the separation hole by decomposing the portion of the pyrolysis material pattern comprises removing a source material of the etch stop layer adsorbed on the pyrolysis material pattern while decomposing the portion of the pyrolysis material pattern;
• and
• selectively removing a portion of the gate electrode exposed by the separation hole using the etch stop layer.

A method of manufacturing a semiconductor device, comprising:

• providing a semiconductor structure including a plurality of active patterns that extend on a substrate in a first direction, a plurality of gate lines that intersect the plurality of active patterns and extend in a second direction that intersects the first direction, and a plurality of intergate insulating portions that overlap in a direction perpendicular to a surface of the substrate respective ones of the plurality of active patterns and are respectively between ones of the plurality of gate lines, wherein the plurality of gate lines include first and second gate lines adjacent to each other, and wherein each of the plurality of gate lines includes a gate, an electrode and a gate capping layer on the gate electrode;
• forming a mask layer on the plurality of gate lines and the plurality of intergate insulating portions;
• forming a first opening that exposes a first cut region of the first gate line and a second opening that exposes a second cut region of the second gate line, in the mask layer, wherein the first and second cut regions are adjacent one another in the first direction;
• forming first and second separation holes by removing portions of the gate capping layer exposed by the first and second openings using the mask layer;
• including pyrolysis material patterns in each of the first and second separation holes, wherein upper surfaces of the pyrolysis material patterns are closer to the substrate than an upper surface of the mask layer;
• exposing side wall portions of the first and second separation holes by decomposing portions of the pyrolysis material patterns;
• forming an etch stop layer on the upper surface of the mask layer and on the exposed side wall portions of the first and second separation holes;
• and
• removing portions of the gate electrode exposed by the first and second separation holes using the etch stop layer.