Quasi-vertical power device

A semiconductor device, comprising:

• a substrate;
• a first semiconductor region of a first conductivity type having a first doping concentration, the first conductivity type being one of a n-type conductivity or a p-type conductivity, the first semiconductor region including a base surface;
• a buffer region positioned between the substrate and the first semiconductor region;
• a second semiconductor region of the first conductivity type and having a second doping concentration that is less than the first doping concentration, the second semiconductor region positioned over the base surface of the first semiconductor region;
• at least one first device terminal positioned over the base surface of the first semiconductor region;
• a third semiconductor region of a second conductivity type, the second conductivity type being the other of the n-type conductivity or the p-type conductivity, disposed over at least one sidewall of the second semiconductor region, a bandgap of the third semiconductor region is greater than or equal to a bandgap of the second semiconductor region;
• and
• at least one second device terminal positioned over a top surface of the second semiconductor region and in contact with the third semiconductor region or a doped region formed over or in the second semiconductor region.