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US 12,740,050 B2Granted
Semiconductor memory device and method for fabricating same
AssigneeHangzhou HFC Semiconductor Co.
InventorsQiangtao Zhu, Pengpeng Wang, Fanyou Kong, Tao Wang, John H Zhang
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Abstract
A semiconductor memory device and a method for fabricating the device are disclosed. In the semiconductor memory device, a doped epitaxial silicon layer epitaxially grown on a surface of a silicon layer within a trench electrically connects a transistor to a trench capacitor.
Claims10
A method for fabricating a semiconductor memory device, comprising:
- providing a semiconductor substrate that comprises a stack of a doped silicon substrate, a buried oxide layer and a silicon layer,
- forming at least one trench in the semiconductor substrate, wherein the at least one trench is lined with an isolation layer, wherein the isolation layer extends from a surface of the doped silicon substrate to a surface of the buried oxide layer, wherein the at least one trench is filled with a polysilicon layer, and wherein a top surface of the polysilicon layer is lower than a top surface of the isolation layer;
- forming a doped epitaxial silicon layer on a surface of the silicon layer within the at least one trench and forming an epitaxial polysilicon layer on the polysilicon layer within at least one the trench by performing an epitaxy process, wherein the epitaxial polysilicon layer is joined to the doped epitaxial silicon layer;
- forming at least one isolation trench by etching the silicon layer and the doped epitaxial silicon layer;
- forming an isolation dielectric layer, wherein the isolation dielectric layer fills the at least one isolation trench and extends over the doped epitaxial silicon layer;
- and
- forming at least one gate structure on the silicon layer and forming a passing word line (PWL) on the isolation dielectric layer.
4 more elements
A semiconductor memory device, comprising:
- a semiconductor substrate comprising a stack of a doped silicon substrate, a buried oxide layer and a silicon layer, wherein at least one trench is formed in the semiconductor substrate, wherein the at least one trench is lined with an isolation layer, wherein the isolation layer extends from a surface of the doped silicon substrate to a surface of the buried oxide layer, and wherein the at least one trench is filled with a polysilicon layer that has a top surface lower than a top surface of the isolation layer;
- an epitaxial polysilicon layer formed on the polysilicon layer within the at least one trench;
- a doped epitaxial silicon layer formed on a surface of the silicon layer within the at least one trench, wherein the doped epitaxial silicon layer is joined to the epitaxial polysilicon layer;
- at least one isolation trench extending from inside the doped epitaxial silicon layer to the surface of the buried oxide layer;
- an isolation dielectric layer, which fills the at least one isolation trench and extends over the doped epitaxial silicon layer;
- and
- at least one gate structure formed on the silicon layer and a passing word line (PWL) formed on the isolation dielectric layer.
4 more elements
Dependencies are inferred from the claim text.