Selective etching and deposition of memory layers to provide capacitor-to-active silicon electrical coupling

A method to electrically couple a capacitor to an active silicon region of a memory structure, the method comprising:

• providing a substrate including the memory structure;
• performing a plurality of deposition and etch cycles to remove a portion of one or more dielectric layers from the substrate, enlarge a trench between adjacent bitline structures of the memory structure, and provide access to at least one of a polymer layer or a dielectric layer adjacent to an upper portion of the active silicon region;
• performing a breakthrough operation including etching the at least one of the polymer layer or the dielectric layer in the trench to expose the upper portion of the active silicon region;
• and
• performing an over-etch operation to remove the upper portion of the active silicon region to provide access for electrically coupling the capacitor to a remaining lower portion of the active silicon region,
• wherein the over-etch operation is distinct from the breakthrough operation and includes at least one of i) supplying a different gas than supplied during the breakthrough operation, and ii) supplying gas at a different pressure than supplied during the breakthrough operation.