Core resonance suppression in signal integrity optimized package

A semiconductor package:

• a core comprising a top surface and bottom surface, wherein the core is formed of a dielectric material;
• and
• one or more first ground planes coupled to the top surface of the core, wherein each first ground plane of the one or more first ground planes comprises a respective first region circumscribed by a respective first ditch, wherein each respective first region comprises a first electrically conductive material, wherein each respective first ditch is configured to electrically isolate the respective first region;
• and
• one or more second planes coupled to the bottom surface of the core, wherein each second plane of the one or more second planes comprises a respective second region circumscribed by a respective second ditch, wherein each respective second region comprises a second electrically conductive material, wherein each respective second ditch is configured to electrically isolate the respective second region.

A substrate comprising:

• a dielectric core comprising a top surface and bottom surface;
• a first ground plane coupled to the top surface of the dielectric core, wherein the first ground plane comprises a first ground island coupled to an analog ground and circumscribed by a first ditch, wherein the first ditch is configured to electrically isolate the first ground island from other areas of the first ground plane;
• and
• a second ground plane coupled to the bottom surface of the dielectric core, wherein the second ground plane comprises a second ground island circumscribed by a second ditch, wherein the second ditch is configured to electrically isolate the second ground island from other areas of the second ground plane.