Increasing burst error tolerance on OTN
AssigneeCisco Technology, Inc.
InventorsGilberto Loprieno, Emanuele Umberto Giacometti, Davide Codella
Life of this patent
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Abstract
Embodiments herein describe re-ordering bit-interleaved data to be byte-interleaved data before transmitting the data on an OTN. For example, a transmitter can receive interleaved bits for different symbols that are part of an error correction code to be transmitted in an optical transport network. The transmitter re-orders the interleaved bits into interleaved bytes where each of the interleaved bytes correspond to one of the different symbols. The interleaved bytes can then be transmitted on the OTN.
Claims17
A device, comprising:
- a transmitter configured to:
- receive interleaved bits for different symbols to be transmitted in an optical transport network (OTN),
- re-order the interleaved bits into interleaved bytes, wherein each of the interleaved bytes corresponds to one of the different symbols, and
- transmit the interleaved bytes on the OTN, wherein transmitting the interleaved bytes comprises:
- transmitting, to a receiver in the OTN, a first byte for a first Forward Error Correction (FEC) circuit in the receiver, and
- transmitting, to the receiver, a second byte for a second FEC circuit in the receiver, wherein the second byte immediately follows the first byte.
A method comprising:
- providing, at a transmitter, interleaved bits for different symbols to be transmitted in an optical transport network (OTN);
- re-ordering the interleaved bits into interleaved bytes, wherein each of the interleaved bytes corresponds to one of the different symbols;
- and
- transmitting the interleaved bytes on the OTN to a receiver, wherein transmitting the interleaved bytes comprises:
- transmitting, to the receiver, a first byte for a first Forward Error Correction (FEC) circuit in the receiver;
- and
- transmitting, to the receiver, a second byte for a second FEC circuit in the receiver, wherein the second byte immediately follows the first byte.
A device, comprising:
- a receiver configured to receive interleaved bytes from a transmitter in an OTN, wherein each of the interleaved bytes corresponds to a different symbol of an error correction code, wherein the interleaved bytes were re-ordered from interleaved bits at the transmitter;
- a first Forward Error Correction (FEC) circuit configured to correct errors in the interleaved bytes;
- and
- a second FEC circuit, wherein the interleaved bytes comprise a first byte for the first FEC circuit and a second byte for the second FEC circuit, wherein the second byte immediately follows the first byte.
Dependencies are inferred from the claim text.