ADC offset DAC glitch suppression
AssigneeCadence Design Systems, Inc.
InventorsChunkyun Seok, Christopher George Moscone, Mark A. Summers
Life of this patent
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AssigneeCadence Design Systems, Inc.
InventorsChunkyun Seok, Christopher George Moscone, Mark A. Summers
Estimating the term…
An analog-to-digital converter (ADC) circuit includes a digital calibration finite state machine to perform an offset calibration process during mission mode by iteratively adjusting bias currents within source follower buffers of the ADC circuit to compensate for offset errors. The ADC circuit also includes a current steering digital-to-analog converter (DAC) with a single-ended unit current cell that has an independently controllable positive switch and negative switch. The unit current cell receives a strobe signal used to update a calibration code of the offset calibration process. In response to transitioning from an off state to an on state, the unit current cell uses a precharge signal based on the strobe signal to precharge its tail node before turning on its positive switch, thereby suppressing glitches caused by transients in the bias currents.
An analog-to-digital converter (ADC) circuit, comprising:
A method for suppressing glitches in an analog-to-digital converter (ADC) circuit during an offset calibration process, comprising:
An analog-to-digital converter (ADC) circuit, comprising:
Dependencies are inferred from the claim text.