Pre-emphasis driving circuit and method

A driving circuit, comprising:

• a delay circuit configured to generate a delayed first signal by introducing a delay to a first signal;
• a control circuit configured to provide a first control signal and a second control signal according to the first signal, and provide a third control signal and a fourth control signal according to the first signal and the delayed first signal;
• a first driver, comprising:
• a first P-type transistor coupled between a line of a first power supply voltage and a pad, and having a gate receiving the first control signal;
• and
• a first N-type transistor coupled between a ground and the pad, and having a gate receiving the second control signal;
• and
• a second driver, comprising:
• a second P-type transistor coupled between a line of a second power supply voltage and the pad, and having a gate receiving the third control signal;
• and
• a second N-type transistor coupled between the ground and the pad, and having a gate receiving the fourth control signal,
• wherein the second power supply voltage is less than the first power supply voltage, and the first and second control signals are the same, and the third and fourth control signals are different.

A pre-emphasis driving method for a driving circuit, comprising:

• generating a delayed first signal by delaying a first signal through a delay circuit;
• generating a first control signal and a second control signal to a first driver of the driving circuit according to the first signal, wherein the first driver comprises a first P-type transistor coupled between a line of a first power supply voltage and a pad, and a first N-type transistor coupled between the ground and the pad;
• generating a third control signal and a fourth control signal to a second driver of the driving circuit according to the first signal and the delayed first signal, wherein the second driver comprises a second P-type transistor coupled between a line of a second power supply voltage and the pad, and a second N-type transistor coupled between a ground and the pad;
• turning on the first P-type transistor by the first control signal and turning on the second P-type transistor by the third control signal when the first signal is at a high voltage level and the delayed first signal is at a low voltage level;
• turning on the first P-type transistor by the first control signal and turning off the second P-type transistor by the third control signal when the first signal and the delayed first signal are at the high voltage level;
• and
• turning on the first N-type transistor by the second control signal and turning on the second N-type transistor by the fourth control signal when the first signal is at the low voltage level and the delayed first signal is at the high voltage level.