US 12,738,930 B2Granted

Clock circuit

AssigneeNXP B.V.

InventorsYikun Mo, Hongyan Yao, Yizhong Zhang, Jianluo Chen, Xinhao Miao

Life of this patent

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Abstract

A clock circuit comprising a voltage-controlled oscillator having an input coupled to an output of an amplifier, and an output, outputting an output clock signal. The clock circuit further comprises, a reference branch and a feedback branch, both comprising, a first switch coupled to an input via an inverter and a second switch coupled to the input. The branches also both comprise, a variable capacitor coupled to a reference potential and coupled to the first switch, and a variable resistor coupled to the first switch. Both branches comprise a supply voltage coupled to the variable resistor and an output node, wherein the second switch is coupled to the variable capacitor and coupled to a node. The reference branch input is an input clock signal and the output is a reference voltage, and the feedback branch input is an output clock signal and the output is a feedback voltage.

Claims20

Dependent claims

A clock circuit comprising:

an amplifier having a first input, a second input, and an output;
a voltage controlled oscillator having an input coupled to the output of the amplifier and an output for outputting an output clock signal of the clock circuit;
a reference branch comprising:
an input for receiving an input reference clock signal having a frequency fin;
a first switch coupled to the input via an inverter, for control of the first switch by the input reference clock signal,
a second switch coupled to the input, for control of the second switch by the input reference clock signal,
a variable capacitor having a first terminal coupled to a reference potential and a second terminal coupled to a first terminal of the first switch,
a variable resistor having a first terminal coupled to a second terminal of the first switch,
a supply voltage node coupled to a second terminal of the variable resistor, and
an output node coupled between the first terminal of the variable resistor and the second terminal of the first switch to output a reference voltage of the reference branch to the first input of the amplifier,
wherein the second switch has a first terminal coupled to the first terminal of the variable capacitor and a second terminal coupled to a node between the second terminal of the variable capacitor and the first terminal of the first switch;
and
a feedback branch comprising:
a feedback input coupled to the output of the voltage controlled oscillator for receiving the output clock signal of the clock circuit,
a first switch coupled to the feedback input via an inverter, for control of the first switch by the output clock signal of the clock circuit,
a second switch coupled to the feedback input, for control of the second switch by the output clock signal of the clock circuit,
a variable capacitor having a first terminal coupled to the reference potential and a second terminal coupled to a first terminal of the first switch of the feedback branch,
a variable resistor having a first terminal coupled to a second terminal of the first switch of the feedback branch,
a supply voltage node coupled to a second terminal of the variable resistor of the feedback branch, and
an output node coupled between the first terminal of the variable resistor of the feedback branch and the second terminal of the first switch of the feedback branch to output a feedback voltage of the feedback branch to the second input of the amplifier,
wherein the second switch of the feedback branch has a first terminal coupled to the first terminal of the variable capacitor of the feedback branch and a second terminal coupled to a node between the second terminal of the variable capacitor of the feedback branch and the first terminal of the first switch of the feedback branch.

18 more elements

A microcontroller unit, MCU, or a microprocessor unit, MPU, comprising a clock circuit, the clock circuit comprising:

an amplifier having a first input, a second input, and an output;
a voltage controlled oscillator having an input coupled to the output of the amplifier and an output for outputting an output clock signal of the clock circuit;
a reference branch comprising:
an input for receiving an input reference clock signal having a frequency fin,
a first switch coupled to the input via an inverter, for control of the first switch by the input reference clock signal,
a second switch coupled to the input, for control of the second switch by the input reference clock signal,
a variable capacitor having a first terminal coupled to a reference potential and a second terminal coupled to a first terminal of the first switch,
a variable resistor having a first terminal coupled to a second terminal of the first switch,
a supply voltage node coupled to a second terminal of the variable resistor, and
an output node coupled between the first terminal of the variable resistor and the second terminal of the first switch to output a reference voltage of the reference branch to the first input of the amplifier,
wherein the second switch has a first terminal coupled to the first terminal of the variable capacitor and a second terminal coupled to a node between the second terminal of the variable capacitor and the first terminal of the first switch;
and
a feedback branch comprising:
a feedback input coupled to the output of the voltage controlled oscillator for receiving the output clock signal of the clock circuit,
a first switch coupled to the feedback input via an inverter, for control of the first switch by the output clock signal of the clock circuit,
a second switch coupled to the feedback input, for control of the second switch by the output clock signal of the clock circuit,
a variable capacitor having a first terminal coupled to the reference potential and a second terminal coupled to a first terminal of the first switch of the feedback branch,
a variable resistor having a first terminal coupled to a second terminal of the first switch of the feedback branch,
a supply voltage node coupled to a second terminal of the variable resistor of the feedback branch, and
an output node coupled between the first terminal of the variable resistor of the feedback branch and the second terminal of the first switch of the feedback branch to output a feedback voltage of the feedback branch to the second input of the amplifier,
wherein the second switch of the feedback branch has a first terminal coupled to the first terminal of the variable capacitor of the feedback branch and a second terminal coupled to a node between the second terminal of the variable capacitor of the feedback branch and the first terminal of the first switch of the feedback branch.

18 more elements

Dependencies are inferred from the claim text.

Facts

Application: 19/208,964Filed 15 May 2025
Priority: CN 202410657891.124 May 2024
Published: US 2025/0364978 A127 Nov 2025
Granted: 15 Sep 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H03K 5/00006
Manipulating of pulses not covered by one of the other main groups of this subclass: changing the frequency
H03L 7/097
Concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal: using a comparator…
G06F 1/08
Generating or distributing clock signals or signals derived directly therefrom: clock generators with changeable or programmable clock frequency
H03F 3/45475
Characterised by the way of implementation of the active amplifying circuit in the differential amplifier: using IC blocks as the active…