US 12,738,895 B2Granted

Radio-frequency amplifiers with automatic bias compensation

AssigneeNXP B.V.

InventorsElie A. Maalouf, Xu Jason Ma

Life of this patent

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Abstract

An RF amplifier can be provided with bias control circuitry that includes memory storing stores nominal gate bias voltages for one or more transistors of the amplifier as well as gate bias offset values. The offset values can be used to adjust the gate bias voltage by increasing or reducing the gate bias voltage of the transistor(s) based on a temperature signal received from a temperature sensor. The nominal gate bias voltages and gate bias offset values are determined based upon characterization of the individual transistors of the amplifier and how adjusting the gate bias voltages of these transistors effects the overall performance of the amplifier. The memory is programmed to adjust the gate bias of the transistors to achieved selected performance characteristics such as output linearity, dynamic range, power efficiency, or a selected trade-off between such characteristics over a selected range of operating temperatures.

Claims18

Dependent claims

A radio-frequency (RF) amplifier module comprising:

an input node and an output node;
a temperature sensor;
a transistor device configured to receive an RF input signal from the input node and to output a first amplified signal corresponding to the RF input signal to the output node;
control circuitry coupled to the transistor device, wherein the control circuitry includes analog to digital converter (ADC) circuitry and digital to analog converter (DAC) circuitry;
and
memory coupled to the control circuitry, the memory storing a set of digital offset values;
wherein the control circuitry is configured to bias a gate terminal of the transistor device at a selected operating point for a first operating temperature of the amplifier module by:
receiving a first temperature value from the temperature sensor corresponding to the first operating temperature;
determining a location in the memory corresponding to the first temperature value;
retrieving, from the location in the memory corresponding to the first temperature value, a first digital offset value from the set of digital offset values stored in the memory;
determining a first offset voltage using the first digital offset value;
determining a bias voltage value that corresponds to a sum of a nominal gate bias voltage of the transistor device and the first offset voltage;
and
biasing the gate terminal of the transistor device with a gate voltage bias that corresponds to the bias voltage value using the DAC circuitry.

11 more elements

A radio-frequency (RF) Doherty amplifier module comprising:

an input node and an output node;
a temperature sensor;
a carrier amplifier device and a peaking amplifier device, both configured to receive an RF input signal from the input node and to output a first amplified signal corresponding to the RF input signal to the output node;
control circuitry coupled to the carrier amplifier circuit and the peaking amplifier circuit, wherein the control circuitry includes analog to digital conversion (ADC) circuitry and digital to analog conversion (DAC) circuitry;
and
memory coupled to the control circuitry that stores a first set of digital offset values and second set of digital offset values;
wherein the control circuitry is configured to bias the carrier amplifier and the peaking amplifier at selected operating points for a first operating temperature of the amplifier module by:
receiving a first temperature value from the temperature sensor corresponding to the first operating temperature;
determining first and second locations in the memory that correspond to the first temperature value;
retrieving, from the first location in the memory corresponding to the first temperature value, a first digital offset value from the first set of digital offset values and retrieving, from the second location in the memory, a second digital offset value from the second set of digital offset values;
determining a first offset voltage using the first digital offset value and a second offset voltage using the second digital offset value;
determining a first bias voltage value that corresponds to a sum of a nominal gate bias voltage for the carrier amplifier and the first offset voltage;
determining a second gate bias voltage value that corresponds to a sum of a nominal gate bias voltage for the peaking amplifier and the second offset voltage;
biasing the carrier amplifier device with a gate voltage bias that corresponds to the first bias voltage value using the DAC circuitry;
and
biasing the peaking amplifier device with a gate voltage bias that corresponds to the second bias voltage value using the DAC circuitry.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/634,401Filed 12 Apr 2024
Published: US 2025/0323602 A116 Oct 2025
Granted: 15 Sep 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H03F 1/0288
In transistor amplifiers: using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using…
H03F 3/245
Of transmitter output stages: with semiconductor devices only
H03F 2200/451
Indexing scheme relating to amplifiers: the amplifier being a radio frequency amplifier
H03F 2200/468
Indexing scheme relating to amplifiers: the temperature being sensed