Machine learning for netlist design

A processor-implemented method, comprising:

• accessing a directed graph (DG) representing a netlist design for an electrical circuit, the netlist design comprising a plurality of electronic components and a plurality of connections among the plurality of electronic components;
• selecting a first node in the DG, the first node corresponding to a first register that receives input from one or more components in the netlist design;
• generating a first subgraph for the first node, based on the DG, comprising identifying a connectivity cone ending at the first register;
• generating a second subgraph that is functionally equivalent to the first subgraph;
• generating a first functional embedding for the first subgraph based on an encoder machine learning model;
• generating a second functional embedding for the second subgraph based on the encoder machine learning model;
• and
• updating one or more parameters of the encoder machine learning model based on comparing the first and second functional embeddings.

A processing system comprising:

• a memory comprising computer-executable instructions;
• and
• one or more processors configured to execute the computer-executable instructions and cause the processing system to perform an operation, comprising:
• accessing a directed graph (DG) representing a netlist design for an electrical circuit, the netlist design comprising a plurality of electronic components and a plurality of connections among the plurality of electronic components;
• selecting a first node in the DG, the first node corresponding to a first register that receives input from one or more of the plurality of electronic components in the netlist design;
• generating a first subgraph for the first node, based on the DG, comprising identifying a connectivity cone ending at the first register;
• generating a first functional embedding for the first subgraph based on a trained encoder machine learning model;
• and
• generating a predicted performance characteristic of the netlist design based at least in part on the first functional embedding.

A processing system, comprising:

• means for accessing a directed graph (DG) representing a netlist design for an electrical circuit, the netlist design comprising a plurality of electronic components and a plurality of connections among the plurality of electronic components;
• means for selecting a first node in the DG, the first node corresponding to a first register that receives input from one or more of the plurality of electronic components in the netlist design;
• means for generating a first subgraph for the first node, based on the DG, comprising identifying a connectivity cone ending at the first register;
• means for generating a first functional embedding for the first subgraph based on a trained encoder machine learning model;
• and
• means for generating a predicted performance characteristic of the netlist design based at least in part on the first functional embedding.