Device, method, and system to determine a count of retired prefetch instructions

A method at a processor, the method comprising:

• monitoring an execution of instructions by a processor;
• detecting a first retirement of a first instruction;
• making a first determination that the first instruction is of a prefetch instruction type;
• based on the first determination, updating a first count of one or more retirements each of a respective instruction which is of the prefetch instruction type;
• detecting a second retirement of a second instruction;
• making a second determination that the second instruction is of an instruction type other than the prefetch instruction type;
• and
• generating a signal to prevent an update of the first count based on the second determination.

A system comprising:

• a memory to store multiple instructions which are to be executed in a sequence;
• a processor coupled to the memory, the processor comprising:
• performance monitor circuitry to monitor an execution of the multiple instructions by the processor, wherein the performance monitor circuitry is to detect a first retirement of a first instruction, and to detect a second retirement of a second instruction;
• counter circuitry coupled to the performance monitor circuitry, wherein the counter circuitry is to:
• make a first determination that the first instruction is of a prefetch instruction type;
• based on the first determination, update a first count of one or more retirements each of a respective instruction which is of the prefetch instruction type;
• make a second determination that the second instruction is of an instruction type other than the prefetch instruction type;
• and
• generate a signal to prevent an update of the first count based on the second determination;
• and
• a network interface coupled to the processor, the network interface to receive and transmit data over a network.