Memory sub-channel reliability
AssigneeAmazon Technologies, Inc.
InventorsErez Sabbag, Itai Avron, Anat Arbely
Life of this patent
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Abstract
Techniques to improve the reliability of volatile memory may include receiving a write request to store a data chunk in a volatile memory implemented using a memory module that contains a plurality of memory sub-channels. In response to the write request, a first write access is performed to write at least a first portion of the data chunk into a first memory sub-channel of the memory module, and a second write access is performed to write at least a second portion of the data chunk into a second memory sub-channel of the memory module.
Claims19
A computing system comprising:
- a host processor;
- a reliability control circuit;
- and
- a volatile memory implemented using a plurality of memory modules, each of the memory modules having a plurality of memory sub-channels, wherein each memory sub-channel includes a plurality of memory designated for storing data and at least one memory die designated for storing error correction code information for the data stored in the plurality of memory dies,
- wherein the reliability control circuit is operable to:
- receive a write request from the host processor to store a cache line at a target address in the volatile memory;
- and
- in response to the write request,
- perform a first write burst chop access to write a first half of the cache line into a first set of memory dies of a first memory sub-channel of a memory module;
- and
- perform a second write burst chop access to write a second half of the cache line into a second set of memory dies of a second memory sub-channel of the memory module.
A method comprising:
- receiving a write request to store a data chunk in a volatile memory implemented using a memory module that contains a plurality of memory sub-channels;
- in response to the write request:
- performing a first write access to write at least a first portion of the data chunk into a first memory sub-channel of the memory module;
- and
- performing a second write access to write at least a second portion of the data chunk into a second memory sub-channel of the memory module,
- determining that a memory device in the first memory sub-channel is defective when an error count of the memory device exceeds an error threshold;
- and
- repurposing working memory devices in the first memory sub-channel from being used for storing data to being used for storing enhanced error correction code information for data stored in the second memory sub-channel.
An integrated circuit comprising:
- a memory interface;
- and
- reliability control circuitry operable to:
- receive a write request to store a data chunk in a volatile memory implemented using a memory module having a plurality of memory sub-channels;
- in response to the write request:
- perform a first write access via the memory interface to write at least a first portion of the data chunk into a first memory sub-channel of the memory module;
- and
- perform a second write access via the memory interface to write at least a second portion of the data chunk into a second memory sub-channel of the memory module,
- determine that a memory device in the first memory sub-channel is defective when an error count of the memory device exceeds an error threshold;
- and
- repurpose working memory devices in the first memory sub-channel from being used for storing data to being used for storing enhanced error correction code information for data stored in the second memory sub-channel.
Dependencies are inferred from the claim text.