Current and clock frequency management
AssigneeMicron Technology, Inc.
InventorsLeon Zlotnik, Leonid Minz, Ekram H. Bhuiyan
Life of this patent
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Abstract
Current sensing circuitry and clock management circuitry provide current and clock frequency management. In one example, an apparatus can include a voltage regulator, current sensing circuitry configured to: detect a current associated with the voltage regulator of a system-on-chip (SoC), and determine when the current transitions from a first current to a second current; and clock management circuitry configured to: generate clocking signals for the SoC, select a gradient frequency alteration based on the detected current, and alter a frequency of the generated clocking signals to the gradient frequency alteration in response to the detected current transition.
Claims20
An apparatus, comprising:
- a voltage regulator;
- current sensing circuitry configured to:
- detect a current associated with the voltage regulator of a system-on-chip (SoC);
- and
- determine when the current transitions from a first current to a second current, wherein the current transition indicates a mode transition of the SoC from an idle mode to an operation mode;
- and
- clock management circuitry configured to:
- generate clocking signals for the SoC;
- select a gradient frequency alteration based on the detected current and the mode transition, wherein the gradient frequency alteration consists of a plurality of frequency alterations for the mode transition from the idle mode to the operation mode;
- and
- alter a frequency of the generated clocking signals to the gradient frequency alteration in response to the detected current transition.
A method, comprising:
- detecting, by current sensing circuitry, a current associated with a voltage regulator of a system-on-chip (SoC);
- determining, by the current sensing circuitry, when the detected current is transitioning from a first current to a second current, wherein the transitioning indicates a mode transition of the SoC from an idle mode to an operation mode;
- generating, by clock management circuitry coupled to the current sensing circuitry, clocking signals for the SoC;
- selecting, by the clock management circuitry, a gradient frequency alteration based on the detected current and the mode transition, wherein the gradient frequency alteration consists of a plurality of frequency alterations for the mode transition from the idle mode to the operation mode;
- and
- altering, by the clock management circuitry, a frequency of the generated clocking signals to the gradient frequency alteration in response to the detected current transition.
A system, comprising:
- a plurality of computing components coupled to a system-on-chip (SoC), wherein the SoC comprises:
- a voltage regulator;
- a current sensing circuit configured to:
- detect a current associated with the voltage regulator of the SoC;
- and
- determine when the current transitions from a first current to a second current, wherein the current transition indicates a mode transition of the SoC from an idle mode to an operation mode;
- and
- clock management circuitry configured to:
- generate clocking signals for the SoC;
- select a gradient frequency alteration based on the current and the mode transition, wherein the gradient frequency alteration consists of a plurality of frequency alterations for the mode transition from the idle mode to the operation mode;
- alter a frequency of the generated clocking signals to the gradient frequency alteration in response to the detected current transition;
- and
- apply the clocking signals having the altered frequency to one or more of the plurality of computing components or to one or more components of the SoC.
Dependencies are inferred from the claim text.